SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 42

• Manufacturer Part Number: SC2200
• Description: Thin Client On a Chip
• Manufacturer: NSC [National Semiconductor]

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Signal Definitions
Ball
No.
M2
M3
M4
M28
M29
M30
M31
N1
N2
N3
N4
N13
N14
N15
N16
N17
N18
N19
N28
N29
N30
N31
Signal Name
AD7
A7
V
AD8
A8
GPIO32
LAD0
GPIO13
AB2D
V
V
AD3
A3
AD6
A6
AD5
A5
V
V
V
V
V
V
V
V
V
GPIO12
AB2C
AB1D
GPIO1
IOCS1#
AB1C
GPIO20
DOCCS#
IO
IO
SS
SS
CORE
CORE
SS
SS
SS
CORE
CORE
SS
Table 2-4.
(PU/PD)
(PU
(PU
(PU
(PU
(PU
(PU
(PU
(PU
(PU
(PU
PWR
PWR
PWR
PWR
PWR
PWR
GND
GND
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
22.5
22.5
22.5
22.5
22.5
22.5
22.5
22.5
22.5
22.5
(Continued)
)
)
)
)
)
)
)
)
)
)
481-TEPBGA Ball Assignment - Sorted by Ball Number (Continued)
Buffer
IN
IN
IN
IN
IN
IN
IN
Type
IN
IN
IN
IN
IN
IN
O
O
O
O
O
O
O
O
O
O
O
O
O3/5
O
OD
O
OD
OD
O
O
OD
O
IN
IN
---
---
---
---
---
---
---
---
---
---
---
---
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
AB
8/8
AB
AB
8/8
AB
AB
3/5
3/5
AB
3/5
T
T
8
8
8
,
8
,
,
,
,
,
,
,
,
,
,
,
,
,
,
1
Power
Rail
V
V
V
V
V
V
V
V
V
V
V
---
---
---
---
---
---
---
---
---
---
---
---
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
Configuration
Cycle Multiplexed
---
Cycle Multiplexed
PMR[14]
PMR[22]
PMR[14]
PMR[22]
PMR[19] = 0
PMR[19] = 1
---
---
Cycle Multiplexed
Cycle Multiplexed
Cycle Multiplexed
---
---
---
---
---
---
---
---
---
PMR[19] = 0
PMR[19] = 1
PMR[23]
PMR[23]
PMR[13] = 0
PMR[23]
PMR[13] = 1
PMR[23]
PMR[23]
PMR[7] = 0
PMR[23]
PMR[7] = 1
4
4
4
4
3
3
3
3
3
3
= 0 and
= 0
= 1 and
= 1
= 0
= 1 and
= 1 and
= 0
= 1 and
= 1 and
42
Ball
No.
P1
P2
P3
P4
P13
P14
P15
P16
P17
P18
P19
P28
P29
P30
P31
R1
R2
R3
R4
R13
R14
R15
R16
R17
R18
R19
R28
R29
R30
R31
T1
T2
T3
T4
T13
T14
T15
T16
T17
Signal Name
AD4
A4
IDE_CS1#
TFTDE
AD1
A1
V
V
V
V
V
V
V
V
V
SDATA_OUT
TFT_PRSNT
SYNC
CLKSEL3
AC97_CLK
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
CORE
CORE
CORE
SS
SS
SS
CORE
CORE
CORE
SS
SS
SS
SS
SS
SS
SS
SS
SS
SS
SS
SS
SS
SS
SS
CORE
CORE
CORE
CORE
SS
SS
SS
SS
SS
(PU/PD)
(PD
(PD
PWR
PWR
PWR
GND
GND
GND
PWR
PWR
PWR
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PWR
PWR
PWR
PWR
GND
GND
GND
GND
GND
I/O
I/O
I/O
O
O
O
O
O
O
O
I
I
100
100
)
)
Buffer
IN
IN
O
O
IN
IN
Type
O
O
O
O
O
O
O
AC97
STRP
AC97
STRP
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
PCI
PCI
PCI
PCI
PCI
PCI
1/4
1/4
2/5
,
,
1
Power
Rail
V
V
V
V
V
V
V
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
IO
IO
IO
IO
IO
IO
IO
Configuration
Cycle Multiplexed
PMR[24] = 0
PMR[24] = 1
Cycle Multiplexed
---
---
---
---
---
---
---
---
---
---
Strap (See Table 2-
6 on page 51.)
---
Strap (See Table 2-
6 on page 51.)
PMR[25] = 1
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
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