SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 268

• Manufacturer Part Number: SC2200
• Description: Thin Client On a Chip
• Manufacturer: NSC [National Semiconductor]

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Core Logic Module
5.4.4
The register designated as Function 3 (F3) is used to con-
figure the PCI portion of support hardware for the Xpres-
sAUDIO registers. The bit formats for the PCI Header
registers are given in Table 5-37.
Index 00h-01h
Index 02h-03h
Index 04h-05h
Index 06h-07h
Index 08h
Index 09h-0Bh
Index 0Ch
Index 0Dh
Index 0Eh
Index 0Fh
Index 10h-13h
This register sets the base address of the memory mapped audio interface control register block. This is a 128-byte block of registers
used to control the audio FIFO and codec interface, as well as to support VSA SMIs. Bits [11:0] are read only (0000 0000 0000), indicat-
ing a 4 KB memory address range. Refer to Table 5-38 on page 269 for the XpressAUDIO configuration register bit formats and reset
values.
Index 14h-2Bh
Index 2Ch-2Dh
Index 2Eh-2Fh
Index 30h-FFh
31:12
15:3
11:0
Bit
2
1
0
XpressAUDIO Registers - Function 3
Description
Reserved. (Read Only)
Bus Master. Allow the Core Logic module bus mastering capabilities.
0: Disable.
1: Enable. (Default)
This bit must be set to 1.
Memory Space. Allow the Core Logic module to respond to memory cycles from the PCI bus.
0: Disable.
1: Enable.
This bit must be enabled to access memory offsets through F3BAR0 (See F3 Index 10h).
Reserved. (Read Only)
XpressAUDIO Interface Base Address
Address Range. (Read Only)
Table 5-37. F3: PCI Header Registers for XpressAUDIO Audio Configuration
(Continued)
Base Address Register - F3BAR0 (R/W)
Vendor Identification Register (RO)
Device Identification Register (RO)
PCI Cache Line Size Register (RO)
Device Revision ID Register (RO)
PCI Latency Timer Register (RO)
PCI Class Code Register (RO)
PCI Command Register (R/W)
Subsystem Vendor ID (RO)
PCI Status Register (RO)
PCI BIST Register (RO)
PCI Header Type (RO)
Subsystem ID (RO)
Reserved
Reserved
268
Header registers of F3, is used for pointing to the register
space designated for support of XpressAUDIO, described
later in this section.
A Base Address register (F3BAR0), located in the PCI
Reset Value: 00000000h
Reset Value: 040100h
Reset Value: 100Bh
Reset Value: 100Bh
Reset Value: 0503h
Reset Value: 0000h
Reset Value: 0280h
Reset Value: 0503h
Reset Value: 00h
Reset Value: 00h
Reset Value: 00h
Reset Value: 00h
Reset Value: 00h
Reset Value: 00h
Reset Value: 00h
Revision 3.0