SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 374

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SC2200

Manufacturer Part Number
SC2200
Description
Thin Client On a Chip
Manufacturer
NSC [National Semiconductor]
Datasheet

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Electrical Specifications
8.3.3
Table 8-13 and Figure 8-7 describe the timing of the digital CRT interface of the SC2200. All measurement points in this
table are identical to the voltage measurement levels described in Table 8-10 on page 369.
Note that signals DDC_SCL and DDC_SDA of the CRT interface are compliant with standard ACCESS.bus timing and are
controlled by software.
1.
Symbol
t
t
t
t
t
t
OV
OV
CLK_RF
CLK_P
CLK_P
CLK_D
TFTDCK
Guaranteed by characterization
TFTD[17:0]
TFTDE
CRT and TFT Interface
Parameter
TFTD[17:0], TFTDE valid time after TFTDCK rising
edge (multiplexed on IDE)
TFTD[17:0], TFTDE valid time after TFTDCK rising
edge (multiplexed on Parallel Port)
TFTDCK rise/fall time
TFTDCK period time (multiplexed on IDE)
TFTDCK period time (muxed on Parallel Port)
TFTDCK duty cycle
(Continued)
1
between 0.8V and 2.0V
Table 8-13. TFT Timing Parameters
Figure 8-7. TFT Timing Diagram
t
OV
374
t
CLK_P
12.5
Min
25
0
0
40/60
Max
8
4
3
t
CLK_RF
Unit
ns
ns
ns
ns
ns
%
Comments
Revision 3.0

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