MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1011

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
For some operations, additional information is required to process the data in the packet.
This additional information is provided in the variable-sized payload buffer, which can be
found at the address specified in the payload pointer field. When encryption is specified,
the payload may include the encryption key (if the key selected resides in the packet), an
initialization vector (for modes of operation such as CBC), and expected hash values when
data hashing is indicated. The hardware can automatically compare the expected hash with
the actual hash and interrupt the processor only on a mismatch. The payload area is used
by software to store the calculated hash value at the end of hashing operations (when the
HASH_TERM control bit is set).
13.2.6.4.1 Next Command Address Field
The NEXT_COMMAND_ADDRESS field (as shown in the following table) is used to
point to the next work packet in the chain. This field is loaded into the channel's command
pointer after the current packet has completed processing if the CHAIN bit in the
CONTROL0 field (see
programmed to a non-zero value when the CHAIN bit is set; otherwise, the channel will
flag an invalid setup error.
13.2.6.4.2 Control0 Field
The main functions of the DCP module are enabled with the ENABLE_MEMCOPY,
ENABLE_BLIT, ENABLE_CIPHER and ENABLE_HASH bits from the Control0 field
in the work packet. The combinations of these bits determine the function performed by
the DCP.
Freescale Semiconductor, Inc.
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Table 13-5
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27
Word2
Word3
Word4
Word5
Word6
Word7
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i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
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summarizes the function performed for each combination.
Table 13-3. DCP Next Command Address Field
Table
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13-4) is set. The Next Command Address field should be
Table 13-4. DCP Control0 Field
20
20
NEXT_COMMAND_ADDRESS
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19
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17
17
16
16
Destination Buffer Addr
15
15
Source Buffer Addr
Payload Pointer
14
14
Buffer Size
Control1
13
13
Status
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12
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11
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10
Chapter 13 Data Co-Processor (DCP)
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