MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2156

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
34.4.6 PXP Source 0 (video) Input Buffer Pointer (HW_PXP_S0BUF)
S0 Input Buffer Pointer. This should be programmed to the starting address of the RGB
data or Y (luma) data for the S0 plane.
This register contains the pointer to the Luma/RGB buffer.
EXAMPLE
HW_PXP_S0BUF_WR(image_rgb); // RGB image
HW_PXP_S0BUF_WR(image_y);
HW_PXP_S0UBUF_WR(image_u);
HW_PXP_S0VBUF_WR(image_v);
Address:
Re-
34.4.7 Source 0 U/Cb or 2 Plane UV Input Buffer Pointer
S0 Chroma (U/Cb/UV) Input Buffer Pointer. This register points to the beginning of the
Source 0 U/Cb input buffer. In two plane operation, this register points to the beginning of
the Source 0 UV chroma input buffer.
This register contains the pointer to the Chroma U/Cb or 2 plane UV buffer when performing
colorspace conversion. This register is unused when processing RGB data.
2156
set
Bit
W
R
31
0
HEIGHT
ADDR
Field
11 0
Field
31 0
30
0
29
0
(HW_PXP_S0UBUF)
HW_PXP_S0BUF
28
0
Indicates the number of vertical PIXELS in the output image (independent of the rotation). The image size
is not required to be a multiple of 8 pixels. The PXP will handle clipping the pixel output at this boundary.
Address pointer for the S0 RGB or Y (luma) input buffer. The address MUST be word-aligned for proper
PXP operation.
27
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
HW_PXP_OUTSIZE field descriptions (continued)
0
24
0
23
0
8002_A000h base + 50h offset = 8002_A050h
// Y (luma) image data
// U (Cb) image data
// V (Cr) image data
HW_PXP_S0BUF field descriptions
22
0
21
0
20
0
19
0
18
0
17
0
ADDR
16
0
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0