MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1455

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Address:
Re-
20.4.34 Shadow Register for OTP Bank3 Word7 (ROM Use 7)
Copied from the OTP automatically after reset. Can be re-loaded by setting
HW_OCOTP_CTRL[RELOAD_SHADOWS].
Shadowed memory mapped access to OTP Bank 3, word 7 (ADDR = 0x1F).
Address:
Freescale Semiconductor, Inc.
set
Reset
Reset
Bit
W
R
Bit
Bit
31
W
W
0
R
R
Field
31 0
BITS
RECOVERY_BOOT_MODE
30
0
31
15
0
0
29
0
HW_OCOTP_ROM7
HW_OCOTP_ROM6
(HW_OCOTP_ROM7)
28
0
30
14
0
0
[15:12]
Shadow register for ROM-use word6 (Copy of OTP Bank 3, word 6 (ADDR = 0x1E)). These bits become
read-only after the HW_OCOTP_LOCK[ROM_SHADOW] bit is set.
27
0
26
0
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
0
28
12
RSRVD2
0
0
23
0
HW_OCOTP_ROM6 field descriptions
8002_C000h base + 210h offset = 8002_C210h
8002_C000h base + 200h offset = 8002_C200h
22
0
27
11
0
0
21
0
20
0
26
10
0
0
19
0
18
25
0
0
0
9
17
0
16
24
0
0
0
BITS
8
15
0
Description
23
14
0
0
0
7
13
0
22
RSRVD0
12
0
0
6
0
Chapter 20 On-Chip OTP (OCOTP) Controller
11
0
21
CONFIG
0
5
0
10
0
HAB_
0
9
20
0
4
0
0
8
0
7
RECOVERY_BOOT_MODE
19
0
0
3
0
6
0
5
18
0
0
2
[19:16]
0
4
3
0
17
0
0
1
0
2
0
1
1455
16
0
0
0
0
0