MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1571

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

25.4.10.5 Arbitration and Matching Timing
During normal transmission or reception of frames, the arbitration, matching, move-in and
move-out processes are executed during certain time windows inside the CAN frame, as
shown in
When doing matching and arbitration, FlexCAN needs to scan the whole Message Buffer
memory during the available time slot. In order to have sufficient time to do that, the
following requirements must be observed:
Freescale Semiconductor, Inc.
• A valid CAN bit timing must be programmed, as indicated in
• The peripheral clock frequency can not be smaller than the oscillator clock frequency,
• There must be a minimum ratio between the peripheral clock frequency and the CAN
that is the PLL can not be programmed to divide down the oscillator clock
bit rate, as specified in
Figure
Time Segment 1
It is the user's responsibility to ensure the bit time settings are in
compliance with the CAN standard. For bit time calculations, use
an IPT (Information Processing Time) of 2, which is the value
implemented in the FlexCAN module.
4 .. 11
5 .. 12
6 .. 13
7 .. 14
8 .. 15
9 .. 16
25-3.
Figure 25-3. Arbitration, Match and Move Time Windows
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
CRC (15)
Matching/Arbitration Window (24 bits)
Table 25-8
Note
Time Segment 2
3
4
5
6
7
8
Chapter 25 Controller Area Network (FlexCAN)
EOF (7)
Start Move
(bit 6)
Re-synchronization Jump Width
Table 25-7
Window
Interm
Move
1 .. 3
1 .. 4
1 .. 4
1 .. 4
1 .. 4
1 .. 4
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