MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 131

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

The enable bit, FIQ-enable, the software interrupt bit, and the two-bit priority level
specification for each interrupt source bit are contained with a single programmable register
for each interrupt. The path from any interrupt source to the FIQ or IRQ logic is shown in
Figure 5-2
The data path for generating the vector address (readable by software) for the IRQ generation
portion of the interrupt collector is implemented as a multicycle path, as shown in
5-3. The interrupt sources are continuously sampled in the holding register until one or more
arrive. The FSM causes the holding register to stop sampling while a vector address is
computed. Each interrupt source bit is applied to one of the four levels based on the two-bit
priority specification of each source bit. When the holding register closes, there can be more
than one newly arrived source bit. Thus, the source bits could be assigned such that more
than one interrupt level is requesting an interrupt. The pipeline first determines the highest
level requesting interrupt service. All interrupt requests on that level are presented to the
linear priority encoder. The result of this stage is a six-bit number corresponding to the
source bit number of the highest priority requesting an interrupt. This six-bit source number
is used to compute the vector address as follows:
Freescale Semiconductor, Inc.
VectorAddress = VectorBase + (Pitch * SourceBitNumber)
Pitch = 4,8, 12,16,20,24, or 28 as desired, see HW_CTRL_VECTOR_PITCH.
using HW_ICOLL_INTERRUPT33 as an example.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Chapter 5 Interrupt Collector (ICOLL)
Figure
131