MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1687

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

26.4.35 ENET MAC RMON Tx packet drop
Count of frames not counted correctly
Note: Counter not implemented (read 0 always) as not applicable
Freescale Semiconductor, Inc.
Reset
RX_PROTERR_
RX_LINEERR_
RX_IP_PAD_
RX_IPERR_
Bit
DISCARD
DISCARD
REMOVE
W
RSRVD0
SHIFT16
RSRVD1
R
DISC
Field
31 8
5 3
7
6
2
1
0
15
0
(HW_ENET_MAC_RMON_T_DROP)
14
0
Reserved bits. Write as 0.
If set 1, instructs the MAC to write 2 additional bytes in front of each frame received into the RX FIFO. The
actual frame data then starts at bit 16 of the first word read from the RX FIFO aligning the Ethernet payload
on a 32-bit boundary.
Note: If this function only affects the FIFO storage and has no influence on the statistics, which still use the
actual length of the frame received.
Enable discard of frames with MAC layer errors.
If set any frame received with a CRC, length or PHY error is automatically discarded and not forwarded to
the user application interface. See 12.4 page 55.
Reserved bits. Write as 0.
Enable discard of frames with wrong protocol checksum.
If set and TCP/IP, UDP/IP or ICMP/IP frame is received that has a wrong TCP or UDP or ICMP checksum
the frame is discarded.
Discarding is only available when the RX FIFO operates in Store and Forward mode.
Enable discard of frames with wrong IPv4 header checksum.
If set and an IPv4 frame is received with a mismatching header checksum, the frame will be discarded. IPv6
has no header checksum and will therefore not be affected by this setting.
Discarding is only available when the RX FIFO operates in Store and Forward mode.
Enable padding removal for short IP frames.
If set any bytes following the IP payload section of the frame are removed from the frame.
13
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_ENET_MAC_IPACCRXCONF field descriptions
RSRVD0[15:8]
12
0
11
0
10
0
0
9
0
8
Description
0
7
0
6
5
0
Chapter 26 Ethernet Controller (ENET)
RSRVD1
4
0
0
3
0
2
0
1
1687
0
0