MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1190

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
14.8.97 DRAM Control Register 102 (HW_DRAM_CTL102)
This is a DRAM configuration register.
Address:
Re-
1190
set
Bit
PHY_OBS_REG_
W
R
31
0
Field
Field
31 0
0_3
30
0
29
0
HW_DRAM_CTL102
28
0
Bits [5:4] = Loopback mask data. Reports the actual data mask or the expected data mask, depending on
the setting of the phy_ctrl_reg_1_X [20] parameter bit.
Bit [1] = Reports status of loopback errors.
'b0 = Last Loopback test had no errors.
'b1 = Last Loopback test contained data errors.
Bit [0] = Defines the status of the loopback mode.
'b0 = Not in loopback mode.
'b1 = In Loopback mode.
All other bits Reserved.
Controls loopback status, data and masking info for slice 3. READ-ONLY
Reports status for the PHY.
Bit [24] = Status signal to indicate that the logic gate had to be forced closed.
'b0 = Normal operation
'b1 = Gate close was forced
Bits [23:8] = Loopback data. Reports the actual data or expected data, depending on the setting of the
phy_ctrl_reg_1_X [20] parameter bit.
Bits [5:4] = Loopback mask data. Reports the actual data mask or the expected data mask, depending on
the setting of the phy_ctrl_reg_1_X [20] parameter bit.
Bit [1] = Reports status of loopback errors.
'b0 = Last Loopback test had no errors.
'b1 = Last Loopback test contained data errors.
Bit [0] = Defines the status of the loopback mode.
'b0 = Not in loopback mode.
'b1 = In Loopback mode.
27
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_DRAM_CTL101 field descriptions (continued)
25
0
24
0
23
0
HW_DRAM_CTL102 field descriptions
800E_0000h base + 198h offset = 800E_0198h
22
0
21
0
20
0
19
0
PHY_OBS_REG_0_3
18
0
17
0
16
0
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0