MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 141

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
5.3 Behavior During Reset
A soft reset (SFTRST) can take multiple clock periods to complete, so do NOT set
CLKGATE when setting SFTRST. The reset process gates the clocks automatically. See
Correct Way to Soft Reset a
CLKGATE bit fields.
5.4 Programmable Registers
ICOLL Hardware Register Format Summary
Freescale Semiconductor, Inc.
8000_00C0
8000_00D0
8000_0000
8000_0010
8000_0020
8000_0040
8000_0070
8000_00A0
8000_00B0
8000_0120
8000_0130
8000_0140
8000_0150
8000_0160
8000_0170
Absolute
address
(hex)
Interrupt Collector Interrupt Vector Address Register
(HW_ICOLL_VECTOR)
Interrupt Collector Level Acknowledge Register
(HW_ICOLL_LEVELACK)
Interrupt Collector Control Register (HW_ICOLL_CTRL)
Interrupt Collector Interrupt Vector Base Address Register
(HW_ICOLL_VBASE)
Interrupt Collector Status Register (HW_ICOLL_STAT)
Interrupt Collector Raw Interrupt Input Register 0
(HW_ICOLL_RAW0)
Interrupt Collector Raw Interrupt Input Register 1
(HW_ICOLL_RAW1)
Interrupt Collector Raw Interrupt Input Register 2
(HW_ICOLL_RAW2)
Interrupt Collector Raw Interrupt Input Register 3
(HW_ICOLL_RAW3)
Interrupt Collector Interrupt Register 0
(HW_ICOLL_INTERRUPT0)
Interrupt Collector Interrupt Register 1
(HW_ICOLL_INTERRUPT1)
Interrupt Collector Interrupt Register 2
(HW_ICOLL_INTERRUPT2)
Interrupt Collector Interrupt Register 3
(HW_ICOLL_INTERRUPT3)
Interrupt Collector Interrupt Register 4
(HW_ICOLL_INTERRUPT4)
Interrupt Collector Interrupt Register 5
(HW_ICOLL_INTERRUPT5)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Register name
Block, for additional information on using the SFTRST and
HW_ICOLL memory map
(in bits)
Width
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Chapter 5 Interrupt Collector (ICOLL)
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
C003_0000h
Reset value
0000_0000h
0000_0000h
0000_0000h
0000_007Fh
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
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Section/
page
141

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