MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1494

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Programmable Registers
22.8.8 Persistent State Register 1 (HW_RTC_PERSISTENT1)
The 32-bit persistent registers are used to retain certain control states during chip wide
power-down states.
HW_RTC_PERSISTENT1: 0x070
HW_RTC_PERSISTENT1_SET: 0x074
HW_RTC_PERSISTENT1_CLR: 0x078
HW_RTC_PERSISTENT1_TOG: 0x07C
1494
CLOCKSOURCE
ALARM_WAKE_
ALARM_WAKE
XTAL32_FREQ
XTAL24MHZ_
XTAL32KHZ_
MSEC_RES
ALARM_EN
LCK_SECS
PWRUP
PWRUP
Field
12 8
EN
7
6
5
4
3
2
1
0
This bit field encodes the value of the millisecond count resolution in a one-hot format. Resolutions supported
are: 1, 2, 4, 8, and 16 msec. The bitfield directly gives the resolution without need for decode.
Set when the chip is powered up by an alarm event from rtc_ana. Can then be cleared by software as
desired.
If CLOCKSOURCE (bit 0 of this register) is one, then this bit gives the exact frequency of the 32kHz crystal.
If this bit is zero, the frequency is 32.768kHZ, if it is one, the frequency is 32.000kHz. If CLOCKSOURCE
is zero, the value of this bit is immaterial.
Set to one to power up the 32kHz crystal oscillator. Set to zero to disable the oscillator. This bit controls the
oscillator at all times (chip powered on or not).
Set to one to keep the 24.0-MHz crystal oscillator powered up while the chip is powered down. Set to zero
to disable during chip power down. Note: The oscillator is always on while the chip is powered on.
Set to one to lock down the seconds count. Once this bit is written with a 1, the user will not be able to either
write to the seconds register or to change this bit back to a zero -- except by removing the battery.
Set this bit to one to enable the detection of an alarm event. This bit must be turned on before an alarm
event can awaken a powered-down device, or before it can generate an alarm interrupt to a powered-up
CPU. When the alarm is not present in the device (as indicated by the fuse bits) the copy of shadow0 to
persistent0 will not allow bit[2] to be written and persistent bit[2] will always read back 0, regardless of the
values in the shadow register.
This bit is set to one to upon the arrival of an alarm event that powers up the chip. ALARM_EN must be set
to one to enable the detection of an alarm event.
This bit is reset by writing a zero directly to the shadow register, which causes the copy controller to move
it across to the analog domain.
Set to one to select the 32-kHz crystal oscillator as the source for the 32-kHz clock domain used by the RTC
analog domain circuits. Set to zero to select the 24-MHz crystal oscillator as the source for generating the
32-kHz clock domain used by the RTC analog domain circuits.
HW_RTC_PERSISTENT0 field descriptions (continued)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Description
Freescale Semiconductor, Inc.

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