MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 834

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
9.4.81 PINCTRL Bank 3 Interrupt Status Register
The PINCTRL Bank 3 Interrupt Status Register reflects pending interrupt status for the pins
in bank 3.
HW_PINCTRL_IRQSTAT3: 0x1430
HW_PINCTRL_IRQSTAT3_SET: 0x1434
HW_PINCTRL_IRQSTAT3_CLR: 0x1438
HW_PINCTRL_IRQSTAT3_TOG: 0x143C
This register reflects the pending interrupt status for pins in bank 3. Bits in this register are
automatically set by hardware when an interrupt condition (level high, level low, rising
edge, or falling edge) occurs on a bank 3 pin which has been enabled as an interrupts source
in the HW_PINCTRL_PIN2IRQ3 register. Software may clear any bit in this register by
writing a 1 to the bit at the SCT clear address, e.g., HW_PINCTRL_IRQSTAT3_CLR.
Status bits for pins configured as level sensitive interrupts cannot be cleared unless either
the actual pin is in the non-interrupting state, or the pin has been disabled as an interrupt
source by clearing its bit in HW_PINCTRL_PIN2IRQ3. If a bit is set in this register, and
the corresponding bit is also set in the HW_PINCNTRL_IRQEN3 mask register, then the
GPIO3 interrupt will be asserted to the interrupt collector.
Address:
834
Reset
Reset
Bit
Bit
W
W
R
R
31
15
0
0
(HW_PINCTRL_IRQSTAT3)
HW_PINCTRL_IRQSTAT3
9430h
30
14
0
0
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
27
11
0
0
8001_8000h base + 1430h offset = 8001_
26
10
0
0
25
0
0
9
IRQSTAT[15:0]
24
0
0
IRQSTAT[30:16]
8
23
0
0
7
22
0
0
6
21
0
5
0
20
0
4
0
Freescale Semiconductor, Inc.
19
0
0
3
18
0
0
2
17
0
0
1
16
0
0
0