MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 610

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Programmable Registers
7.5.91 APBX DMA Channel 12 Next Command Address Register
The APBX DMA Channel 12 next command address register points to the next multiword
command to be executed. Commands are threaded on the command address. Set CHAIN
to one to process command lists.
APBX DMA Channel 12 is controlled by a variable sized command structure. Software
loads this register with the address of the first command structure to process and increments
the Channel 12 semaphore to start processing. This register points to the next command
structure to be executed when the current command is completed.
Address:
Re-
7.5.92 APBX DMA Channel 12 Command Register
The APBX DMA Channel 12 command register specifies the cycle to perform for the current
command chain item.
The command register controls the overall operation of each DMA command for this channel.
It includes the number of bytes to transfer to or from the device, the number of APB PIO
command words included with this command structure, whether to interrupt at command
completion, whether to chain an additional command to the end of this one and whether
this transfer is a read or write DMA transfer.
610
set
Bit
W
R
CMD_ADDR
31
0
Field
31 0
30
0
29
0
(HW_APBX_CH12_NXTCMDAR)
(HW_APBX_CH12_CMD)
HW_APBX_CH12_NXTCMDAR 8002_4000h base + 650h offset = 8002_4650h
28
0
Pointer to next command structure for Channel 12.
27
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
HW_APBX_CH12_NXTCMDAR field descriptions
24
0
23
0
22
0
21
0
20
0
19
0
18
0
17
CMD_ADDR
0
16
0
15
0
Description
14
0
13
0
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0

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