MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1747

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

27.2.3.2 Reading 256 bytes from an EEPROM
//----------------------------------------------------------------------
// dma buffers to hold i2c command string for slave addres+W plus sub0,
// sub 1 and the second command, a slave address+R
// eePROM write address == 0xA0,
//----------------------------------------------------------------------
unsigned char eeprom_command_buffer[4] = {0xA0,0x34,0x12,0xA1};
//----------------------------------------------------------------------
// I2C DMA chain
//----------------------------------------------------------------------
const static reg32_t
{
};
const static reg32_t
{
Freescale Semiconductor, Inc.
0x0,
(BF_APBX_CHn_CMD_XFER_COUNT(256) |
(reg32_t) &eeprom_command_buffer[3],
BF_I2C_CTRL0_POST_SEND_STOP(BV_I2C_CTRL0_POST_SEND_STOP_SEND_STOP)|
BF_I2C_CTRL0_MASTER_MODE(BV_I2C_CTRL0_MASTER_MODE_MASTER)
BF_I2C_CTRL0_DIRECTION(BV_I2C_CTRL0_DIRECTION_RECEIVE)
BF_I2C_CTRL0_XFER_COUNT(256)
(reg32_t)
(BF_APBX_CHn_CMD_XFER_COUNT(1) |
BF_APBX_CHn_CMD_WAIT4ENDCMD(1)
BF_APBX_CHn_CMD_SEMAPHORE(1)
BF_APBX_CHn_CMD_CMDWORDS(1)
BF_APBX_CHn_CMD_CHAIN(0)
BV_FLD(APBX_CHn_CMD, COMMAND, DMA_WRITE)),
I2C_DMA_CMD3,
0x00,SUB1, SUB0, I2CADDR+W
1PIO, chaining, DMA read
Figure 27-10. I
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
BUFFER ADDRESS
NEXTCMD_ADDR
HW_I2C_CTRL0=
3
I2C_DMA_CMD3[4] =
I2C_DMA_CMD2[4] =
0x000B0003
1PIO, chaining, DMA read
1
1
0x000000, I2CADDR+R
2
0
BUFFER ADDRESS
NEXTCMD_ADDR
read address == 0xA1
C Reading 256 Bytes from an EEPROM
HW_I2C_CTRL0=
0
1
Pointer to DMA buffer
1
Pointer to next ccw
0x002B0001
10
|
|
|
|
1
1
0
0
1
10
// last command
NEXTCMD_ADDR=0
BUFFER ADDRESS
256
HW_I2C_CTRL0=
1 PIO,IRQ, no chaining,
0x00120100
DMA write
256-Byte
Block
Data
1
1
1
|
|
1
0
01
Chapter 27 Inter IC (I2C)
1747