MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1975

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
31.7.11 System Bus Configuration (Non-EHCI-Compliant) Register
This register controls the AMBA system bus Master/Slave interfaces.
Address:
Re-
Freescale Semiconductor, Inc.
set
Bit
W
R
GPTMODE
AHBBRST
31
GPTCNT
0
RSVD0
29 25
RSVD
Field
23 0
Field
31 3
2 0
24
30
0
29
0
HW_USBCTRL_SBUSCFG
(HW_USBCTRL_SBUSCFG)
28
0
HW_USBCTRL_GPTIMER1CTRL field descriptions (continued)
Reserved.
General-Purpose Timer Mode.
This bit selects between a single timer countdown and a looped count down. In one-shot mode, the timer
will count down to 0, generate an interrupt, and stop until the counter is reset by software. In repeat mode,
the timer will count down to 0, generate an interrupt, and automatically reload the counter to begin again.
0
1
General-Purpose Timer Counter.
This field is the value of the running timer.
Reserved.
AMBA AHB BURST.
This field selects the following options for the m_hburst signal of the AMBA master interface:
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
27
0
ONESHOT — One shot.
REPEAT — Repeat.
26
0
U_INCR — INCR burst of unspecified length.
S_INCR4 — INCR4, non-multiple transfers of INCR4 will be decomposed into singles.
S_INCR8 — INCR8, non-multiple transfers of INCR8 will be decomposed into INCR4 or singles.
S_INCR16 — INCR16, non-multiple transfers of INCR16 will be decomposed into INCR8, INCR4 or
singles.
RESERVED — This value is reserved and should not be used.
U_INCR4 — INCR4, non-multiple transfers of INCR4 will be decomposed into smaller unspecified
length bursts.
U_INCR8 — INCR8, non-multiple transfers of INCR8 will be decomposed into smaller unspecified
length bursts.
U_INCR16 — INCR16, non-multiple transfers of INCR16 will be decomposed into smaller unspecified
length bursts.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
HW_USBCTRL_SBUSCFG field descriptions
0
23
0
22
0
21
0
8008_0000h base + 90h offset = 8008_0090h
20
0
19
0
18
0
RSVD
17
0
Chapter 31 USB High-Speed On-the-Go Host Device Controller
16
0
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
0
8
0
7
0
6
0
5
0
4
3
0
AHBBRST
0
2
0
1
1975
0
0

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