MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1851

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Address:
29.9.8 ENET SWI Bridge Management Port Configuration.
Enables and defines the management port that receives Bridge Protocol Frames
Freescale Semiconductor, Inc.
Reset
Reset
LEARNING_DIS_
LEARNING_DI_
LEARNING_DI_
BLOCKING_
BLOCKING_
BLOCKING_
Bit
Bit
W
W
RSRVD1
RSRVD0
R
R
ENA_P2
ENA_P1
ENA_P0
31 19
Field
15 3
P2
P1
P0
18
17
16
2
1
0
31
15
0
0
(HW_ENET_SWI_MGMT_CONFIG)
HW_ENET_SWI_INPUT_LEARN_BLOCK 800F_8000h base + 1Ch offset
= 800F_801Ch
30
14
0
0
Reserved bits. Write as 0.
disable learning on port 2.
disable learning on port 1.
disable learning on port 0.
Reserved bits. Write as 0.
enable blocking on port 2.
enable blocking on port 1.
enable blocking on port 0.
HW_ENET_SWI_INPUT_LEARN_BLOCK field descriptions
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
27
11
0
0
26
10
0
0
RSRVD1
RSRVD0
Chapter 29 Programmable 3-Port Ethernet Switch with QOS (SWITCH)
25
0
0
9
24
0
0
8
Description
23
0
0
7
22
0
0
6
21
0
5
0
20
0
4
0
19
0
0
3
18
0
0
2
17
0
0
1
1851
16
0
0
0