IPR-PCIE/1 Altera, IPR-PCIE/1 Datasheet - Page 132

• Manufacturer Part Number: IPR-PCIE/1
• Description: IP CORE Renewal Of IP-PCIE/1
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/1

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x1 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

5–48
Figure 5–41. Signals in the Completer-Only, Single Dword, IP Core with Avalon-MM Interface
Note to
(1) This variant is only available in the hard IP implementation.
PCI Express Compiler User Guide
Figure
Avalon-MM Rx
Master Port
32-Bit
5–41:
Reset &
Clock
Status
Figure 5–41
RxmWrite_o
RxmRead_o
RxmAddress_o[31:0]
RxmWriteData_o[31:0]
RxmByteEnable_o[3:0]
RxmWaitRequest_i
RxmReadDataValid_i
RxmReadData_i[31:0]
RxmIrq_i
RxmResetRequest_o
refclk
clk125_out
AvlClk_i
reset_n
pcie_rstn
suc_spd_neg
shows the signals of a completer-only, single dword, PCI Express IP core.
Signals in the Completer Only Single Dword
PCI Express IP Core
test_out[511:0], [63:0], or [9:0]
(1)
(2)
reconfig_fromgxb[<n>:0]
reconfig_togxb[<n>:0]
(test_out is optional)
powerdown0_ext[1:0]
powerdown0_ext[1:0]
gxb_powerdown
rxstatus0_ext[2:0]
txdata0_ext[15:0]
rxdata0_ext[15:0]
txdatak0_ext[1:0]
rxdatak0_ext[1:0]
rxstatus0_ext[2:0]
xphy_pll_areset
xphy_pll_locked
rxelectidle0_ext
txelectidle0_ext
rxpolarity0_ext
rxdata0_ext[7:0]
txdata0_ext[7:0]
rxelectidle0_ext
txdetectrx_ext
txelectidle0_ext
phystatus_ext
reconfig_clk
test_in[31:0]
txcompl0_ext
rxpolarity0_ext
txdetectrx_ext
phystatus_ext
cal_blk_clk
rxvalid0_ext
txcompl0_ext
txdatak0_ext
rxdatak0_ext
pipe_mode
rxvalid0_ext
rx[3:0]
tx[3:0]
December 2010 Altera Corporation
Avalon-MM Application Interface
Chapter 5: IP Core Interfaces
Test
Interface
Implementation
Transceiver
(Repeat for lanes
Implementation
8-Bit PIPE
Simulation
16-Bit PIPE
for x1 and x4
1-3 in x4)
1-Bit Serial
Control
Soft IP
Only
(3)
Hard IP