IPR-PCIE/1 Altera, IPR-PCIE/1 Datasheet - Page 214

• Manufacturer Part Number: IPR-PCIE/1
• Description: IP CORE Renewal Of IP-PCIE/1
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/1

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x1 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

13–8
Table 13–1. Dynamically Reconfigurable Registers in the Hard IP Implementation (Part 7 of 7)
PCI Express Compiler User Guide
0xAA
0xAB
0xAC
0xAD
0xAE
0xAF
B0
0xB1-FF
Address
Bits
15:0 BAR4[159:144].
15:4 BAR5[175:164].
15:0 BAR5[191:176].
15:0
15:0 Expansion BAR[223:208].
15:4 Reserved.
2:1
1:0
3:2
5:0 Reserved
9:7
0
3
6
BAR5[191:160].
Expansion BAR[223:192]: Bar size mask.
Expansion BAR[207:192].
Selectable de-emphasis, operates as specified in the
Express Base Specification
rate:
This setting has no effect when operating at the 2.5GT/s
rate.
Transmit Margin. Directly drives the transceiver
tx_pipemargin bits. Refer to the transceiver
documentation for the appropriate device handbook to
determine what V
Arria II Device Data Sheet and Addendum
the Arria II Device Handbook,
Datasheet
Handbook, or
volume 3 of the Stratix IV Handbook.
Reserved.
BAR5[160]: I/O Space.
IO.
Prefetchable.
BAR5[162:161]: Memory Space (see bit settings for
BAR0).
BAR5[163]: Prefetchable.
BAR5[191:164]: Bar size mask.
00: no IO windows.
01: IO 16 bit.
11: IO 32-bit.
00: not implemented.
01: prefetchable 32.
11: prefetchable 64.
1: 3.5 dB
0: -6 dB.
in volume 3 of the Cyclone IV Device
Stratix IV Dynamic Reconfiguration
OD
settings are available as follows:
Description
when operating at the 5.0GT/s
Cyclone IV Device
in volume 3 of
in
Chapter 13: Reconfiguration and Offset Cancellation
PCI
Default
Value
b’0
b’0
b’0
b’0
b’0
b’0
b’0
b’0
b’0
b’0
b’0
b’0
b’0
—
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December 2010 Altera Corporation
Table 6–3 on page 6–3
Additional Information
Dynamic Reconfiguration
—