IPR-PCIE/1 Altera, IPR-PCIE/1 Datasheet - Page 279

• Manufacturer Part Number: IPR-PCIE/1
• Description: IP CORE Renewal Of IP-PCIE/1
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/1

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x1 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 15: Testbench and Design Example
BFM Procedures and Functions
Table 15–59. dimage7
Table 15–60. chained_dma_test Procedure
Table 15–61.
December 2010 Altera Corporation
Argument range
Return range
Location
Syntax
Arguments
Location
Syntax
Arguments
Procedures and Functions Specific to the Chaining DMA Design Example
dma_rd_test Procedure
altpcietb_bfm_driver_chaining.v or altpcietb_bfm_driver_chaining.vhd
dma_rd_test (bar_table, bar_num, use_msi, use_eplast)
bar_table
bar_num
Use_msi
Use_eplast
altpcietb_bfm_driver_chaining.v or altpcietb_bfm_driver_chaining.vhd
chained_dma_test (bar_table, bar_num, direction, use_msi, use_eplast)
bar_table
bar_num
direction
Use_msi
Use_eplast
vec
string
This section describes procedures that are specific to the chaining DMA design
example. These procedures are located in the VHDL entity file
altpcietb_bfm_driver_chaining.vhd or the Verilog HDL module file
altpcietb_bfm_driver_chaining.v.
chained_dma_test Procedure
The chained_dma_test procedure is the top-level procedure that runs the chaining
DMA read and the chaining DMA write
dma_rd_test Procedure
Use the dma_rd_test procedure for DMA reads from the endpoint memory to the
BFM shared memory.
Address of the endpoint bar_table structure in BFM shared memory.
BAR number to analyze.
When 0 the direction is read.
When 1 the direction is write.
When set, the root port uses native PCI Express MSI to detect the DMA completion.
When set, the root port uses BFM shared memory polling to detect the DMA completion.
Address of the endpoint bar_table structure in BFM shared memory.
BAR number to analyze.
When set, the root port uses native PCI express MSI to detect the DMA completion.
When set, the root port uses BFM shared memory polling to detect the DMA completion.
Input data type reg with a range of 31:0.
Returns a 7-digit decimal representation of the input argument that is padded with
leading 0s if necessary. Return data is type reg with a range of 56:1.
Returns the letter <U> if the value cannot be represented.
PCI Express Compiler User Guide
15–51