IPR-PCIE/1 Altera, IPR-PCIE/1 Datasheet - Page 297

• Manufacturer Part Number: IPR-PCIE/1
• Description: IP CORE Renewal Of IP-PCIE/1
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/1

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x1 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Hardware Bring-Up Issues
Figure 17–1. Debugging Link Training Issues
December 2010 Altera Corporation
December 2010
<edit Part Number variable in chapter>
Check LTSSM
system reset
Link Training
Status
As you bring up your PCI Express system, you may face a number of issues related to
FPGA configuration, link training, BIOS enumeration, data transfer, and so on. This
chapter suggests some strategies to resolve the common issues that occur during
hardware bring-up.
Typically, PCI Express hardware bring-up involves the following steps:
1. System reset
2. Linking training
3. BIOS enumeration
The following sections, describe how to debug the hardware bring-up flow. Altera
recommends a systematic approach to diagnosing bring-up issues as illustrated in
Figure
The physical layer automatically performs link training and initialization without
software intervention. This is a well-defined process to configure and initialize the
device's physical layer and link so that PCIe packets can be transmitted. If you
encounter link training issues, viewing the actual data in hardware should help you
determine the root cause. You can use the following tools to provide hardware
visibility:
■
■
Debugging Link Training Issues Using Quartus II SignalTap II
You can use SignalTap II Embedded Logic Analyzer to diagnose the LTSSM state
transitions that are occurring and the PIPE interface.
SignalTap
Third-party PCIe analyzer
Check PIPE
Does Link
Interface
17–1.
Correctly?
Train
No
®
II Embedded Logic Analyzer
Yes
Use PCIe
Analyzer
Soft Reset System to
Force Enumeration
Enumeration?
Successful
OS/BIOS
No
Yes
PCI Express Compiler User Guide
17. Debugging
Check Configuration
Space