IPR-PCIE/1 Altera, IPR-PCIE/1 Datasheet - Page 36

• Manufacturer Part Number: IPR-PCIE/1
• Description: IP CORE Renewal Of IP-PCIE/1
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/1

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x1 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

2–10
Example 2-1 continued
## INFO: 12536 ns
# INFO: 15896 ns
# INFO: 15896 ns
# INFO: 15896 ns
# INFO: 16504 ns
# INFO: 16840 ns
# INFO: 17496 ns
# INFO: 18328 ns
# INFO: 20440 ns
# INFO: 20712 ns
# INFO: 21600 ns
# INFO: 21614 ns
# INFO: 22006 ns
# INFO: 22052 ns
# INFO: 22724 ns
# INFO: 22742 ns
# INFO: 22846 ns
# INFO: 22900 ns
# INFO: 23152 ns
# INFO: 27936 ns ---------
# INFO: 27936 ns TASK:dma_set_header READ
# INFO: 27936 ns Writing Descriptor header
# INFO: 27976 ns data content of the DT header
# INFO: 27976 ns
# INFO: 27976 ns Shared Memory Data Display:
# INFO: 27976 ns Address Data
# INFO: 27976 ns ------- ----
# INFO: 27976 ns 00000900 00000003 00000000 00000900 CAFEFADE
# INFO: 27976 ns ---------
# INFO: 27976 ns TASK:dma_set_rclast
# INFO: 27976 ns
# INFO: 27992 ns ---------
# INFO: 28000 ns TASK:msi_poll Polling MSI Address:07F0---> Data:FADE......
# INFO: 28092 ns TASK:rcmem_poll
expected data (00000002)
# INFO: 29592 ns TASK:rcmem_poll
expected data (00000002)
# INFO: 31392 ns TASK:rcmem_poll
expected data (00000002)
# INFO: 31392 ns TASK:rcmem_poll ---> Received Expected Data (00000002)
# INFO: 31440 ns TASK:msi_poll
# INFO: 31448 ns Completed DMA Read
# INFO: 31448 ns ---------
# INFO: 31448 ns TASK:chained_dma_test
# INFO: 31448 ns
# INFO: 31448 ns ---------
# INFO: 31448 ns TASK:dma_wr_test
# INFO: 31448 ns
# INFO: 31448 ns ---------
# INFO: 31448 ns TASK:dma_set_wr_desc_data
# INFO: 31448 ns ---------
INFO: 31448 ns TASK:dma_set_msi WRITE
# INFO: 31448 ns Message Signaled Interrupt Configuration
# INFO: 1448 ns
# INFO: 31760 ns
# INFO: 32976 ns
PCI Express Compiler User Guide
msi_address (RC memory)= 0x07F0
msi_control_register = 0x00A5
Start READ DMA : RC issues MWr (RCLast=0002)
msi_expected = 0xB0FD
DMA: Write
DMA: Write
RP LTSSM State: RECOVERY.RCVRLOCK
EP LTSSM State: RECOVERY.RCVRLOCK
EP LTSSM State: RECOVERY.RCVRCFG
RP LTSSM State: RECOVERY.RCVRCFG
RP LTSSM State: RECOVERY.SPEED
EP LTSSM State: RECOVERY.SPEED
EP LTSSM State: RECOVERY.RCVRLOCK
RP LTSSM State: RECOVERY.RCVRLOCK
RP LTSSM State: RECOVERY.RCVRCFG
EP LTSSM State: RECOVERY.RCVRCFG
EP LTSSM State: RECOVERY.IDLE
RP LTSSM State: RECOVERY.IDLE
RP LTSSM State: L0
EP LTSSM State: L0
EP PCI Express Link Status Register (1081):
Negotiated Link Width: x8
Current Link Speed: 5.0GT/s
Slot Clock Config: System Reference Clock Used
Polling RC Address0000090C
Polling RC Address0000090C
Polling RC Address0000090C
Received DMA Read MSI(0000) : B0FC
current data (0000FADE)
current data (00000000)
current data (00000002)
December 2010 Altera Corporation
Chapter 2: Getting Started
Simulate the Design