IPR-PCIE/1 Altera, IPR-PCIE/1 Datasheet - Page 216

IP CORE Renewal Of IP-PCIE/1

IPR-PCIE/1

Manufacturer Part Number
IPR-PCIE/1
Description
IP CORE Renewal Of IP-PCIE/1
Manufacturer
Altera
Type
MegaCorer
Datasheets

Specifications of IPR-PCIE/1

Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
PCI Express Compiler, x1 Link Width
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
13–10
Figure 13–1. ALTGX_RECONFIG Connectivity
Note to
(1) The size of reconfig_togxb and reconfig_fromgxb buses varies with the number of lanes. Refer to
PCI Express Compiler User Guide
Clock Source
page 5–53
Reconfig
Figure
13–1:
for details.
f
reconfig_clk
The chaining DMA design example instantiates the offset cancellation circuitry in the
file <variation name_example_pipen1b>.<v or .vhd>.
connections between the ALTGX_RECONFIG instance and the ALTGX instance. The
names of the Verilog HDL files in this figure match the names in the chaining DMA
design example described in
For more information about the ALTGX_RECONFIG megafunction refer to
Implementing Dynamic Reconfiguration in Arria II GX
about the ALTGX megafunction refer to volume 2 of the
or volume 2 of the
reconfig_clk
altpcie_reconfig_4sgx.v or .vhd
ALTGX_RECONFIG Megafunction
reconfig_fromgxb[16:0]
Stratix IV Device
(Note 1)
reconfig_togxb[3:0]
Clock Source
Clock Source
Reconfig
Fixed
Chapter 15, Testbench and Design
busy
Handbook.
Chapter 13: Reconfiguration and Offset Cancellation
<variant>.v or .vhd
Devices. For more information
Figure 13–1
busy
reconfig_fromgxb[16:0]
reconfig_togxb[3:0]
reconfig_clk
cal_blk_clk
fixedclk
(PCIe MegaCore Function)
<variant>_serdes.v or .vhd
<variant>_core.v or .vhd
Arria II GX Device Handbook
“Transceiver Control Signals” on
(ALTGX or ALT2GX
Megafunction )
December 2010 Altera Corporation
Transceiver Offset Cancellation
Example.
shows the
tx_clk_out
AN 558:

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