IPR-PCIE/1 Altera, IPR-PCIE/1 Datasheet - Page 299

• Manufacturer Part Number: IPR-PCIE/1
• Description: IP CORE Renewal Of IP-PCIE/1
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/1

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x1 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 17: Debugging
Hardware Bring-Up Issues
December 2010 Altera Corporation
BIOS Enumeration Issues
Configuration Space Settings
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The PHY Interface for PCI Express Architecture specification is available on the Intel
website (www.intel.com).
Use Third-Party PCIe Analyzer
A third-party PCI Express logic analyzer records the traffic on the physical link and
decodes traffic, saving you the trouble of translating the symbols yourself. A
third-party PCI Express logic analyzer can show the two-way traffic at different levels
for different requirements. For high-level diagnostics, the analyzer shows the LTSSM
flows for devices on both side of the link side-by-side. This display can help you see
the link training handshake behavior and identify where the traffic gets stuck. A PCIe
traffic analyzer can display the contents of packets so that you can verify the contents.
For complete details, refer to the third-party documentation.
Both FPGA programming (configuration) and the PCIe link initialization require time.
There is some possibility that Altera FPGA including a PCI Express IP core may not be
ready when the OS/BIOS begins enumeration of the device tree. If the FPGA is not
fully programmed when the OS/BIOS begins its enumeration, the OS does not
include the PCI Express module in its device map. To eliminate this issue, you can do
a soft reset of the system to retain the FPGA programming while forcing the OS/BIOS
to repeat its enumeration.
Check the actual configuration space settings in hardware to verify that they are
correct. You can do so using one of the following two tools:
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PCItree (in Windows)–PCItree is a third-party tool that allows you to see the actual
hardware configuration space in the PCIe device. It is available on the PCI Tree
website (www.pcitree.de/index.html).
lspci (in Linux)–lspci is a Linux command that allows you to see actual hardware
configuration space in the PCI devices. Both first, 64 bytes and extended
configuration space of the device are listed. Refer to the lspci Linux man page
(linux.die.net/man/8/lspci) for more usage options. You can find this command in
your /sbin directory.
PCI Express Compiler User Guide
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