IPR-PCIE/1 Altera, IPR-PCIE/1 Datasheet - Page 304

• Manufacturer Part Number: IPR-PCIE/1
• Description: IP CORE Renewal Of IP-PCIE/1
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/1

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x1 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

A–4
Table A–12. Memory Write Request, 64-Bit Addressing
Table A–13. Configuration Write Request Root Port (Type 1)
Table A–14. I/O Write Request
Table A–15. Completion with Data
Table A–16. Completion Locked with Data
PCI Express Compiler User Guide
Byte 0
Byte 4
Byte 8
Byte 12
Byte 0
Byte 4
Byte 8
Byte 12
Byte 0
Byte 4
Byte 8
Byte 12
Byte 0
Byte 4
Byte 8
Byte 12
Byte 0
Byte 4
Byte 8
Byte 12
+0
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7
0 1 0 0 1 0 1 0 0
+0
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7
0 1 0 0 1 0 1 1 0
+0
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7
0 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 TD
+0
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7
0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 TD
0 1 1 0 0 0 0 0 0
Bus Number
Requester ID
Requester ID
Requester ID
Completer ID
Requester ID
Completer ID
Requester ID
+1
+1
+1
+1
TC
TC
TC
Device No
0 0 0 0 TD
0 0 0 0 TD
0 0 0 0 TD
Address[31:2]
Address[63:32]
Address[31:2]
Reserved
Reserved
Reserved
Reserved
+2
0
+2
+2
+2
Status
Status
EP
6
EP
6
EP
0
6
EP
6
EP
5 4 3 2 1 0 7 6 5 4 3 2 1 0
Att
r
5 4 3 2 1 0 7 6 5 4 3 2 1 0
Att
r
5 4 3 2 1 0 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 1
0 0
5 4 3 2 1 0 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 1
Att
Tag
r
Tag
Tag
Tag
Tag
B
B
0 0
0 0
0 0
Ext Reg
TLP Packet Format with Data Payload
December 2010 Altera Corporation
Byte Count
Byte Count
+3
0 0 0 0 First BE
+3
0 0 0 0 First BE
+3
0
+3
0
Last BE
Register No
Length
Length
Length
Lower Address
Lower Address
First BE
Chapter :
0 0
0 0
0 0