IPR-PCIE/1 Altera, IPR-PCIE/1 Datasheet - Page 228

• Manufacturer Part Number: IPR-PCIE/1
• Description: IP CORE Renewal Of IP-PCIE/1
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/1

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x1 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

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PCI Express Compiler User Guide
1
1
You may need to modify the timing constraints to take into account the specific
constraints of your external PHY and your board design.
To meet timing for the external PHY in the Cyclone III family, you must avoid using
dual-purpose V
If you are using an external PHY with a design that does not target a Cyclone II
device, you might need to modify the PLL instance required by some external PHYs
to function correctly.
To modify the PLL instance, follow these steps:
1. Copy the PLL source file referenced in your variation file from the <path>/ip/PCI
2. Use the MegaWizard Plug In Manager to edit the PLL to specify the device that the
3. Add the modified PLL source file to your Quartus II project.
Express Compiler/lib directory, where <path> is the directory in which you
installed the PCI Express Compiler, to your project directory.
PLL uses.
REF
pins.
December 2010 Altera Corporation
External PHY Constraint Support
Chapter 14: External PHYs