IPR-PCIE/1 Altera, IPR-PCIE/1 Datasheet - Page 249

• Manufacturer Part Number: IPR-PCIE/1
• Description: IP CORE Renewal Of IP-PCIE/1
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/1

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x1 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 15: Testbench and Design Example
Test Driver Module
Table 15–18. Read Descriptor 0
Table 15–19. Read Descriptor 1
Table 15–20. Read Descriptor 2
December 2010 Altera Corporation
DW0
DW1
DW2
DW3
Data
Buffer 0
DW0
DW1
DW2
DW3
Data
Buffer 1
DW0
DW1
DW2
DW3
Data
Buffer 2
0x920
0x924
0x928
0x92c
0x10900
0x910
0x914
0x918
0x91c
0x8DF0
0x930
0x934
0x938
0x93c
0x20EF0
Offset in BFM Shared
Shared Memory
Shared Memory
Offset in BFM
Offset in BFM
Memory
3. Waits for the DMA write completion by polling the BFM share memory location
DMA Read Cycles
The procedure dma_rd_test used for DMA read uses the following three steps:
1. Configures the BFM shared memory with a call to the procedure
0x80c, where the DMA write engine is updating the value of the number of
completed descriptor. Calls the procedures rcmem_poll and msi_poll to determine
when the DMA write transfers have completed.
dma_set_rd_desc_data which sets three descriptor tables
Table
15–19, and
82
3
0
0x8DF0
Increment by 1 from
0xAAA0_0001
1,024
0
10
0x10900
Increment by 1 from
0xBBBB_0001
644
0
0
0x20EF0
Increment by 1 from
0xCCCC_0001
Value
Value
Value
Table
15–20).
Transfer length in DWORDS and control bits as described in
page 15–18
Endpoint address value
BFM shared memory data buffer 0 upper address value
BFM shared memory data buffer 0 lower address value
Data content in the BFM shared memory from address: 0x89F0
Transfer length in DWORDS and control bits as described
in
Endpoint address value
BFM shared memory upper address value
BFM shared memory lower address value
Data content in the BFM shared memory from address:
0x20EF0
Transfer length in DWORDS and control bits as described in
on page 15–18
Endpoint address value
BFM shared memory data buffer 1 upper address value
BFM shared memory data buffer 1 lower address value
Data content in the BFM shared memory from address:
0x10900
on page 15–18
Description
Description
Description
(Table
PCI Express Compiler User Guide
15–18,
15–21
on