EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 204

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

6–32
OCT Calibration
Table 6–10. OCT Calibration Block Counts and Placement in Stratix IV Devices (1A through 4C) (Part 1 of 2)
Stratix IV Device Handbook Volume 1
EP4SE230
EP4SE360
EP4SE530
EP4SE820
EP4SGX70
EP4SGX110
EP4SGX180
EP4SGX230
Device
OCT Calibration Block Location
1
Stratix IV devices support calibrated on-chip series termination (R
on-chip parallel termination (R
bank with any of the OCT calibration blocks available in the device provided the
V
I/O bank with the calibration block and its associated RUP and RDN pins.
Table 6–10
devices. For both tables, the following legend applies:
■
■
■
Table 6–10
blocks.
Table 6–10
1152
1152
1517
1760
1152
1517
1760
1152
1152
1517
1152
1517
780
780
780
780
780
780
Pin
CCIO
“v” indicates I/O banks with OCT calibration block
”X” indicates I/O banks without OCT calibration block
“—” indicates I/O banks that are not available in the device
of the I/O bank with the pins using calibrated OCT matches the V
OCT Blocks
Number of
and
and
lists the OCT calibration blocks in Banks 1A through 4C.
10
10
10
10
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Table 6–11
Table 6–11
1A
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
list the location of OCT calibration blocks in Stratix IV
do not show transceiver banks and transceiver calibration
1B
—
—
—
—
—
—
—
—
—
—
—
—
—
—
X
X
X
X
T
) on all I/O pins. You can calibrate the device’s I/O
1C
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
2A
v
v
v
v
v
v
v
v
v
v
v
—
v
—
v
v
v
—
2B
—
—
—
—
—
—
—
—
—
—
—
—
—
—
X
X
X
X
2C
—
—
—
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Bank
Chapter 6: I/O Features in Stratix IV Devices
3A
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
3B
—
—
—
—
—
—
—
X
X
X
X
X
X
X
X
X
X
X
February 2011 Altera Corporation
3C
v
v
v
v
X
X
X
X
X
X
X
X
X
X
X
X
X
X
S
) and calibrated
4A
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
CCIO
OCT Calibration
4B
—
—
—
—
—
—
—
of the
X
X
X
X
X
X
X
X
X
X
X
4C
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X