EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 404

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

10–70
Document Revision History
Table 10–22. Document Revision History (Part 1 of 2)
Stratix IV Device Handbook Volume 1
April 2011
February 2011
March 2010
November 2009
June 2009
April 2009
March 2009
Date
Version
Table 10–22
3.0
3.3
3.2
3.1
2.3
2.2
2.1
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Updated the
Serial Configuration (Serial Configuration
MAX II Device as an External
Updated
Updated the “Fast Active Serial Configuration (Serial Configuration Devices)”, “FPP
Configuration Using a MAX II Device as an External Host” “Configuration Data
Decompression”, and “User Watchdog Timer” sections.
Updated Table 10–2, Table 10–4, Table 10–5, Table 10–7, and Table 10–9.
Applied new template.
Minor text edits.
Added the “Guidelines for Connecting Serial Configuration Devices on an AS Interface”
section.
Updated the “Power-On Reset Circuit” and “Fast Active Serial Configuration (Serial
Configuration Devices)” sections.
Updated Table 10–2, Table 10–4, Table 10–5, Table 10–10, and Table 10–13.
Updated Figure 10–16 and Figure 10–17 with Note 5.
Updated Figure 10–4, Figure 10–5, and Figure 10–13.
Updated the reference in the “Configuration Schemes” section.
Updated Table 10–1 and Table 10–2.
Updated the “FPP Configuration Using a MAX II Device as an External Host”,“Fast Active
Serial Configuration (Serial Configuration Devices)”, “Device Configuration Pins”,
“Remote System Upgrades”, “Remote System Upgrade Mode”, “Estimating Active Serial
Configuration Time”, “Remote System Upgrade State Machine”, and “User Watchdog
Timer” sections.
Removed Table 10-4, Table 10-7, Table 10-8, and Table 10-25.
Minor text edits.
Updated the “VCCPD Pins”, “FPP Configuration Using a MAX II Device as an External
Host”, “Estimating Active Serial Configuration Time”, “Fast Active Serial Configuration
(Serial Configuration Devices)”, “Remote System Upgrades”, “PS Configuration Using a
MAX II Device as an External Host”, and “PS Configuration Using a Download Cable”
sections.
Updated Table 10–3, Table 10–13 and Table 10–2.
Added introductory sentences to improve search ability.
Removed the Conclusion section.
Minor text edits.
Updated Table 10–2.
Updated Table 10–1, Table 10–2, and Table 10–9.
Removed “Referenced Documents” section.
lists the revision history for this chapter.
Chapter 10: Configuration, Design Security, and Remote System Upgrades in Stratix IV Devices
Table
“FPP Configuration Using a MAX II Device as an External
10–10.
Host”.
Changes
Devices)”, and
“PS Configuration Using a
April 2011 Altera Corporation
Document Revision History
Host”,
“Fast Active