EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 407

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

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SIV51011-3.2
Stratix IV Device Handbook Volume 1
February 2011
February 2011
SIV51011-3.2
f
1
1
This chapter describes how to use the error detection cyclical redundancy check
(CRC) feature when a Stratix
errors. The purpose of the error detection CRC feature in the Stratix IV device is to
detect a flip in any of the configuration random access memory (CRAM) bits in
Stratix IV devices due to a soft error. With the error detection circuitry, you can
continuously verify the integrity of the configuration CRAM bits.
In critical applications such as avionics, telecommunications, system control, and
military applications, it is important to be able to do the following:
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The error detection feature is enhanced in the Stratix IV device family. Similar to
Stratix III devices, the error detection and recovery time for single-event upset (SEU)
in Stratix IV devices is reduced when compared with Stratix II devices.
For more information about test methodology for enhanced error detection in
Stratix IV devices, refer to
using CRC in Altera FPGA
Dedicated circuitry is built into Stratix IV devices and consists of a CRC error
detection feature that optionally checks for SEUs continuously and automatically.
For Stratix IV devices, the error detection CRC feature is provided in the Quartus
software version 8.0 and onwards.
Using error detection CRC for the Stratix IV device family has no impact on fitting or
performance of your device.
This chapter contains the following sections:
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■
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Confirm that the configuration data stored in a Stratix IV device is correct
Alert the system to the occurrence of a configuration error
“Error Detection Fundamentals” on page 11–2
“Configuration Error Detection” on page 11–2
“User Mode Error Detection” on page 11–2
“Error Detection Pin Description” on page 11–5
“Error Detection Block” on page 11–6
“Error Detection Timing” on page 11–8
“Recovering From CRC Errors” on page 11–11
11. SEU Mitigation in Stratix IV Devices
Devices.
AN 539: Test Methodology of Error Detection and Recovery
®
IV device is in user mode and recovers from CRC
Subscribe
®
II