TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 143

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

PFDR
(008FH)
PFFC
(003FH)
PFCR
(003EH)
PF
(003CH)
PF5 setting
<PF5F>
PF2 setting
<PF2F>
<PF2C>
<PF5C>
0
1
0
1
bit Symbol
Read/Write
System
Reset State
Hot Reset
State
bit Symbol
Read/Write
System
Reset State
Hot Reset
State
Function
bit Symbol
Read/Write
System
Reset State
Hot Reset
State
Function
bit Symbol
Read/Write
System
Reset State
Hot Reset
State
Function
Note : A read-modify-write operation cannot be performed for the registers PFCR, PFFC and PFFC2.
Input port
Input port
0
I2S0WS output
0
I2S1WS output
0: Port
1: SDCLK
PF7D
PF7F
PF7
R/W
W
7
7
7
7
1
−
1
−
1
−
Output port
Output port
1
1
PF6D
6
6
6
6
1
−
Figure 3.7.28 Register for Port F
PF1 setting
PF4 setting
<PF1F>
<PF4F>
Input/Output buffer drive register for standby mode
<PF1C>
<PF4C>
0
1
0
1
Port F function register
Port F control register
PF5C
PF5D
PF5F
PF5
Port F drive register
5
5
5
−
1
−
5
0
0
−
92CF26A-142
Port F register
Data from external port (Output latch register is set to “1”)
Input port
Input port
0
I2S0DO output
0
I2S1DO output
PF4C
PF4D
PF4F
PF4
4
4
4
0
−
1
−
0
−
4
R/W
Output port
Output port
Refer to following table
Refer to following table
PF3C
PF3D
PF3F
1
1
PF3
3
3
3
1
−
0
−
0
−
3
R/W
W
W
−
PF0 setting
PF3 setting
<PF0F>
<PF3F>
PF2D
PF2C
PF2F
PF2
<PF0C>
<PF3C>
2
2
2
0
−
1
−
0
−
2
0
1
0
1
Input port
Input port
PF1D
PF1C
PF1F
PF1
1
1
−
1
1
0
−
1
0
−
I2S0CKOoutput
0
0
I2S1CKOoutput
TMP92CF26A
PF0D
PF0C
PF0F
Output port
PF0
Output port
0
1
−
0
0
0
0
−
0
−
2007-11-21
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1