TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 487

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

SPICT
(822H)
(823H)
Bit Symbol
Read/Write
Reset State
Function
Bit Symbol
Read/Write
Reset State
Function
(2) SPI Control Register (SPICT)
(a) CRC16_7_B
(b) CRCRX_TX_B
(c) CRCRESET_B
The SPICT register specifies data length, CRC, etc.
the CRC calculation is performed on the transmit data. Otherwise, it is performed on
the received data.
Communicati-
on
Control
0: Disable
1: Enable
CRC Select
0: CRC7
1: CRC16
This bit selects the CRC calculation algorithm from the CRC7 and CRC16.
This bit selects the data to be sent to the CRC generator. When CRCRX_TX_B = 0,
This bit is used to initialize the CRC calculation register.
CRC16_7_B
CEN
15
7
0
0
Control
0: Set to “0”
1: Set to “1”
CRC Data
0: Transmit
1: Receive
CRCRX_TX_B CRCRESET_B
SPCS
SPCS_B
R/W
14
6
1
0
Pin
Figure 3.17.6 SPICT Register
Data Length
Select
0: 8 bits
1: 16 bits
CRC
Calculation
Register
Control
0: Reset
1:Reset
UNIT16
Release
13
5
0
0
SPICT Register
92CF26A-486
Transmit
Mode Select
0: UNIT
1: Sequential
TXMOD
12
4
0
R/W
Transmission
Enable
0: Disable
1: Enable
TXE
11
3
0
Alignment
Enable in
Fullduplex
mode
0: Disable
1: Enable
FDPXE
10
2
0
Receive
Mode Select
0: UNIT
1: Sequential
RXMOD
1
9
0
Receive
Enable
0: Disable
1: Enable
TMP92CF26A
RXE
2007-11-21
0
8
0