TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 514

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TMP92CF26AXBG

Manufacturer Part Number
TMP92CF26AXBG
Description
Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
Manufacturer
Toshiba
Datasheet

Specifications of TMP92CF26AXBG

Processor Series
TLCS-900
Core
900/H
Data Bus Width
16 bit
Program Memory Type
ROM
Program Memory Size
8 KB
Data Ram Size
144 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
136
Number Of Timers
10
Maximum Operating Temperature
+ 50 C
Mounting Style
SMD/SMT
Package / Case
FBGA-228
Development Tools By Supplier
BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA
Quantity:
4 000
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
When I2SnCTL<WLVLn> = 0
When I2SnCTL<WLVLn> = 1
I2SnBUF register
I2SnBUF register
Output order
Output order
MSB-first 16 bits
LSB-first 16 bits
MSB-first 8 bits
LSB-first 8 bits
MSB-first 16 bits
LSB-first 16 bits
MSB-first 8 bits
LSB-first 8 bits
MSB-first 16 bits
LSB-first 16 bits
MSB-first 8 bits
LSB-first 8 bits
MSB-first 16 bits
LSB-first 16 bits
MSB-first 8 bits
LSB-first 8 bits
Note: In case of using monaural setting, and change right / left: I2SnCTL<WLVLn>, data output order change off 1'st
data and 2'nd data.
The following shows how written data is output under various conditions.
4’th Data
3’rd Data
2’nd Data
1’st Data
2’nd Data
1’st Data
31
15
31
15
1’st Data
2’nd Data
30
14
30
14
29
13
29
13
28
12
28
12
27
27
11
11
92CF26A-513
26
10
26
10
4’th Data
3’rd Data
2’nd Data
25
25
1’st Data
9
9
24
24
8
8
3’rd Data
4’th Data
23
23
1’st Data
2’nd Data
7
7
22
22
6
6
21
21
5
5
20
20
4
4
19
19
3
3
TMP92CF26A
18
18
2
2
2007-11-21
1’st Data
2’nd Data
4’th Data
17
17
3’rd Data
1
1
2’nd Data
1’st Data
2’nd Data
1’st Data
16
16
0
0

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