TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 193

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

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(5) Recovery cycle (data hold time) control
BnCSH<BnREC>
When no dummy cycle is inserted (0 wait state)
When a single dummy cycle is inserted (0 wait state)
read cycle is defined by the AC specification. This may lead to data conflicts. Thus, to
avoid this problem, a single dummy cycle can be inserted immediately after an access
cycle for the CSm space by setting the BmCSH<BmREC> bit to 1.
cycle.
For some memory, the data hold time after when the
This single dummy cycle is inserted when another CS space is accessed in the next bus
0
1
A23 to A0
A23 to A0
SDCLK
SDCLK
CSm
CSn
RD
CSm
CSn
RD
92CF26A-192
Dummy
No dummy cycle is inserted (Default).
Dummy cycle is inserted.
CE
or
OE
signal is asserted in a
TMP92CF26A
2007-11-21