TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 714

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

WRTMGCRR
RDTMGCR0
RDTMGCR1
PMEMCR
BROMCR
CSTMGC
Symbol
RAMCR
(3) Memory controller (4/4)
Page
ROM
control
register
Adjust for
Timing of
control
signal
Adjust for
Timing of
control
signal
Adjust for
Timing of
control
signal
Adjust for
Timing of
control
signal
Boot Rom
control
register
RAM
control
register
Name
Address
016AH
016BH
016CH
016DH
0166H
0168H
0169H
Select delay time(TCRS)
00:0.5
01:1.5
10:2.5
11:3.5
B3TCRS1
Select delay time(TCRS)
00:0.5
01:1.5
10:2.5
11:3.5
B1TCRS1
7
0
0
×
×
×
×
×
×
×
×
f
f
f
f
f
f
f
f
SYS
SYS
SYS
SYS
SYS
SYS
SYS
SYS
B3TCRS0
B1TCRS0
6
0
0
92CF26A-713
TACSEL1 TACSEL0
Select area to
change timing
00:CS0
10:CS2
TCWSEL1 TCWSEL0
Select area to
change timing
00:CS0
10:CS2
Select delay time(TCRH)
00:0
01:1
10:2
11:3
B3TCRH1
Select delay time(TCRH)
00:0 x
01:1
10:2
11:3
B1TCRH1
5
0
0
0
0
×
×
×
×
×
×
×
×
f
f
f
f
f
f
f
SYS
SYS
SYS
SYS
SYS
SYS
SYS
f
R/W
SYS
ROM
page
access
0: Disable
1: Enable
B3TCRH0
B1TCRH0
OPGE
01:CS1
11:CS3
01:CS1
11:CS3
4
0
0
0
0
0
R/W
R/W
Wait number on page
00: 1 CLK (n-1-1-1 mode)
01: 2 CLK (n-2-2-2 mode)
10: 3 CLK (n-3-3-3 mode)
11: Reserved
Select delay time(TCWS)
00:0.5
01:1.5
10:2.5
11:3.5
Select delay time(TCRS)
00:0.5
01:1.5
10:2.5
11:3.5
B2TCRS1
Select delay time(TCRS)
00:0.5
01:1.5
10:2.5
11:3.5
OPWR1
B0TCRS1
TCWS1
3
0
0
0
0
×
×
×
×
×
×
×
×
×
×
×
×
f
f
f
f
f
f
f
f
f
f
f
f
R/W
SYS
SYS
SYS
SYS
SYS
SYS
SYS
SYS
SYS
SYS
SYS
SYS
B2TCRS0
Nand-Flash
B0TCRS0
1:disable
OPWR0
0:enable
TCWS0
Area CS
CSDIS
Output
R/W
2
0
0
0
0
1
ROMLESS
Byte number in a page
00: 64 bytes
01: 32 bytes
10: 16 bytes
11: 8 bytes
Select delay time(TAC)
00:0 × f
01:1 × f
10:2 × f
11:Reserved
Select delay time(TCWH)
00:0.5
01:1.5
10:2.5
11:3.5
Select delay time(TCRH)
00:0
01:1
10:2
11:3
B2TCRH1
Select delay time(TCRH)
00:0
01:1
10:2
11:3
Boot
ROM
0: Use
1: No use
B0TCRH1
TCWH1
TAC1
PR1
R/W
0/1
TMP92CF26A
1
1
0
0
0
0
×
×
×
×
×
×
×
×
SYS
SYS
SYS
f
f
f
f
f
f
f
f
×
×
×
×
SYS
SYS
SYS
SYS
SYS
SYS
SYS
SYS
2007-11-21
f
f
f
f
R/W
SYS
SYS
SYS
SYS
B2TCRH0
Vector
address
0: Disable
1: Enable
Always
write “1”
B0TCRH0
TCWH0
TAC0
VACE
PR0
R/W
1/0
0
0
0
0
0
0
−
1