TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 738

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TMP92CF26AXBG

Manufacturer Part Number
TMP92CF26AXBG
Description
Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
Manufacturer
Toshiba
Datasheet

Specifications of TMP92CF26AXBG

Processor Series
TLCS-900
Core
900/H
Data Bus Width
16 bit
Program Memory Type
ROM
Program Memory Size
8 KB
Data Ram Size
144 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
136
Number Of Timers
10
Maximum Operating Temperature
+ 50 C
Mounting Style
SMD/SMT
Package / Case
FBGA-228
Development Tools By Supplier
BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / Rohs Status
 Details

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA
Quantity:
4 000
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA/东芝
Quantity:
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NDECCRD0
NDECCRD1
NDFMCR0
NDFMCR1
Symbol
(11) NAND-Flash controller (1/4)
NANDF
Control0
Register
NANDF
Control1
Register
NANDF
Code ECC
Register0
NANDF
Code ECC
Register1
Name
Address
(Prohibit
(Prohibit
08C0H
08C1H
08C2H
08C3H
08C4H
08C5H
08C6H
08C7H
RMW)
RMW)
Strobe pulse width
(Low width of
Inserted width
Ready
interrupt
0: Disable
1: Enable
NDWE
WE
enable
0: Disable
1: Enable
= (f
INTERDY
ECCD15
ECCD15
STATE3
SPLW1
ECCD7
ECCD7
SYS
R/W
WE
7
0
0
0
0
0
0
0
0
)
) × (set value)
Reed-
Solomon
calculation
end interrupt
0: Disable
1: Enable
ALE
control
0: “L” out
1: “H” out
NDRE
ECCD14
ECCD14
INTRSC
STATE2
SPLW0
ECCD6
ECCD6
ALE
R/W
6
0
0
0
0
0
0
0
0
,
Status read (See the table below.)
92CF26A-737
Strobe pulse width
(High width of NDRE ,
Inserted width
NDWE )
CLE
control
0: “L” out
1: “H” out
= (f
ECCD13
ECCD13
STATE1
SPHW1
ECCD5
ECCD5
CLE
SYS
5
0
0
0
0
0
0
0
) × (set value)
NAND Flash ECC Register (15-8)
NAND Flash ECC Register (15-8)
NAND Flash ECC Register (7-0)
NAND Flash ECC Register (7-0)
R/W
R
control
0: “H” out
1: “L” out
CE
ECCD12
ECCD12
STATE0
SPHW0
ECCD4
ECCD4
CE0
0
4
0
0
0
0
0
0
0
R/W
R
R
R
R
Reed-
Solomon
ECC
latch
0: Disable
1: Enable
Undefined Undefined
control
0: “H” out
1: “L” out
CE
RSECCL
ECCD11
ECCD11
ECCD3
ECCD3
SEER1
CE1
1
3
0
0
0
0
0
0
Reed-
Solomon
operation
0: Encode
1: Decode
Data bus
width
0: 8-bit
1: 16-bit
ECC
circuit
control
0: Disable
1: Enable
ECCD10
ECCD10
(Write)
(Read)
RSEDN
ECCD2
ECCD2
SEER0
BUSW
ECCE
R/W
2
0
0
0
0
0
0
0
Reed-
Solomon
error
calculation
start
0: −
1: Start
*Always read
ECC
calculation
0:Hamming
1: Reed-
NAND
Flash
state
1: Busy
0: Ready
RSESTA
as “0”.
Solomon
ECCD1
ECCD9
ECCD1
ECCD9
ECCS
BUSY
R/W
W
1
0
0
0
0
0
0
0
TMP92CF26A
2007-11-21
Reed-
Solomon
ECC
generator
write control
0: Disable
1: Enable
Clock
control
0: Disable
1: Enable
ECC
reset
control
0: −
1: Reset
*Always
read as
“0”.
RSECGW
ECCRST
SYSCKE
ECCD0
ECCD8
ECCD0
ECCD8
R/W
R/W
0
0
0
0
0
0
0
0

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