TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 54

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

7.
8.
9.
10. The (n-3)th and (n-2)th bytes are used to send the SUM value to the PC in the
11. After sending the SUM value, the boot program waits for the user program
12. The n’th byte is used to echo back the user program start command to the PC.
13. If the user program start command is not correct or a receive error has
The receive data in the 8th byte is baud rate modification data. The five kinds
of baud rate modification data shown in Table 3.4.8 are available. Even when
the baud rate is not changed, the initial baud rate data (28H: 9600 bps) must
be sent. Baud rate modification becomes effective after the echo back
transmission is completed.
The 9th byte is used to echo back the received data to the PC when the data
received in the 8th byte is one of the baud rate modification data
corresponding to the operating frequency of the microcontroller. Then, the
baud rate is changed. If the received baud rate data does not correspond to the
operating frequency, the boot program stops operation after sending the baud
rate modification error code (62H).
The receive data in the 10th to (n-4)th bytes is received as binary data in Intel
Hex format. No echo back data is returned to the PC.
The boot program ignores received data and does not send error code to the PC
until it receives the start mark (3AH for “:”) of Intel Hex format. After
receiving the start mark, the boot program receives a range of data from
record length to checksum and writes the received data to the specified RAM
addresses successively.
If a receive error or checksum error occurs, the boot program stops operation
without sending error code to the PC.
The boot program executes the SUM calculation routine upon detecting the
end record. Thus, after sending the end record, the PC should be placed in a
state in which it waits for SUM data.
order of upper byte and lower byte. For details on how to calculate SUM, see
“SUM calculation” to be described later. SUM calculation is performed after
detecting the end record only when no receives error or checksum error has
occurred. Immediately after SUM calculation is completed, the boot program
sends the SUM value to the PC. After sending the end record, the PC should
determine whether or not writing to RAM has completed successfully based
on whether or not the SUM value is received from the boot program.
start command (C0H). If the SUM value is correct, the PC should send the
user program start command in the (n-1)th byte.
After sending the echo back data, the boot program sets the stack pointer to
4A000H and jumps to the address that is received first as Intel Hex format
data.
occurred, the boot program stops operation after sending the error code to the
PC three times.
92CF26A-53
TMP92CF26A
2007-11-21