TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 645

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TMP92CF26AXBG

Manufacturer Part Number
TMP92CF26AXBG
Description
Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
Manufacturer
Toshiba
Datasheet

Specifications of TMP92CF26AXBG

Processor Series
TLCS-900
Core
900/H
Data Bus Width
16 bit
Program Memory Type
ROM
Program Memory Size
8 KB
Data Ram Size
144 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
136
Number Of Timers
10
Maximum Operating Temperature
+ 50 C
Mounting Style
SMD/SMT
Package / Case
FBGA-228
Development Tools By Supplier
BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / Rohs Status
 Details

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Part Number
Manufacturer
Quantity
Price
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA
Quantity:
4 000
Part Number:
TMP92CF26AXBG
Manufacturer:
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MACCR
(1BFCH)
A read-
modify-
write
operation
cannot be
performed
3.26 Multiply and Accumulate Calculation Unit (MAC)
3.26.1
3.26.1.1 Control Register
64-bit arithmetic operations at high speed. The MAC has the following features:
The TMP92CF26A includes a multiply-accumulate unit (MAC) capable of 32-bit × 32-bit +
bit Symbol
Read/Write
Reset State
Function
Note 1: <MOPST> is write-only and it is read as
Note 2: Writing “1xx” to <MSTTG2:0> and writing “1” to <MOPST> can be executed in the same write cycle.
Note 3: <MOVF> is fixed two system clocks (f
registers are connected to the CPU via a 32-bit bus and can be accessed in one system clock
(f
Registers
SYS
・ One-cycle execution for all MAC operations (excluding register access time)
・ Three operation modes :
・ Support for signed/unsigned operations
・ Support for integer operations only
The MAC in the TMP92CF26A has one control register and three data registers. These
).
The control register is used to control the operation of the MAC.
Overflow
flag
0: No
1: Overflow
overflow
occurred
MOVF
R/W
0
7
Calculation
soft start
0:Don’t care
1:Start
calculation
MOPST
W
0
6
MAC Control Register
Calculation start trigger
000: Write to MACMA<7:0>
001: Write to MACMB<7:0>
010: Write to MACMOR<7:0>
011: Write to MACMOR<39:32>
1xx: Write of “1” to <MOPST>
MSTTG2
92CF26A-642
2) 64-bit − 32-bit × 32-bit
3) 32-bit × 32-bit − 64-bit
5
0
1) 64-bit + 32-bit × 32-bit
SYS
“0”.
) after calculation is started.
MSTTG1
4
0
MSTTG0
3
0
R/W
Sign mode
0: Unsigned
1: Signed
MSGMD
2
0
Calculation mode
00: 64 + 32×32
01: 64 − 32×32
10: 32×32 − 64
11: Reserved
MOPMD1
0
1
TMP92CF26A
MOPMD0
2007-11-21
0
0

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