TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 750

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

TA01MOD
TA23MOD
TA01RUN
TA23RUN
TA1FFCR
TA3FFCR
Symbol
TA0REG
TA1REG
TA2REG
TA3REG
(14) 8-bit timer (1/2)
TMRA01
RUN
register
8-bit timer
register 0
8-bit timer
register 1
TMRA01
MODE
register
TMRA1
Flip-Flop
control
register
TMRA23
RUN
register
8-bit timer
register 2
8-bit timer
register 3
TMRA23
MODE
register
TMRA3
Flip-Flop
control
register
Name
Address
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
110AH
110BH
110CH
110DH
1100H
1102H
1103H
1104H
1105H
1108H
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
Double
buffer
0: Disable
1: Enable
Operation mode
00: 8-bit timer mode
01: 16-bit timer mode
10: 8-bit PPG mode
11: 8-bit PWM mode
Double
buffer
0: Disable
1: Enable
Operation mode
00: 8-bit timer mode
01: 16-bit timer mode
10: 8-bit PPG mode
11: 8-bit PWM mode
TA2RDE
TA01M1
TA23M1
TA0RDE
R/W
R/W
0
0
0
7
0
TA01M0
TA23M0
0
0
6
92CF26A-749
PWM cycle
00: Reserved
01: 2
10: 2
11: 2
PWM cycle
00: Reserved
01: 2
10: 2
11: 2
PWM01
PWM21
5
0
6
7
8
0
6
7
8
PWM00
PWM20
4
0
0
R/W
R/W
W
W
W
W
−
0
−
0
−
0
−
0
IDLE2
0: Stop
1: Operate 0: Stop and clear
Source clock for TMRA1
00: TA0TRG
01: φ T1
10: φ T16
11: φ T256
00: Invert TA1FF
01: Set TA1FF
10: Clear TA1FF
11: Don’t care
IDLE2
0: Stop
1: Operate 0: Stop and clear
00: Invert TA3FF
01: Set TA3FF
10: Clear TA3FF
11: Don’t care
Source clock for TMRA3
00: TA2TRG
01: φ T1
10: φ T16
11: φ T256
TA1CLK1 TA1CLK0 TA0CLK1 TA0CLK0
TA1FFC1 TA1FFC0
TA3CLK1 TA3CLK0 TA2CLK1 TA2CLK0
TA3FFC1 TA3FFC0
I2TA01
I2TA23
3
0
0
1
0
0
1
W
W
TA01PRUN TA1RUN
TA23PRUN TA3RUN
TMRA01
prescaler
1: Run (Count up)
TMRA23
prescaler
1: Run (Count up)
2
0
0
1
0
0
1
R/W
R/W
Up counter
(UC1)
Source clock for TMRA0
00: TA0IN pin
01: φ T1
10: φ T4
11: φ T16
TA1FF
control for
inversion
0: Disable
1: Enable
Up counter
(UC3)
TA3FF
control for
inversion
0: Disable
1: Enable
Source clock for TMRA2
00: Reserved
01: φ T1
10: φ T4
11: φ T16
TA1FFIE
TA3FFIE
TMP92CF26A
1
0
0
0
0
0
0
2007-11-21
R/W
R/W
Up counter
(UC0)
TA1FF
inversion
select
0: TMRA0
1: TMRA1
Up counter
(UC2)
TA3FF
inversion
select
0: TMRA2
1: TMRA3
TA0RUN
TA1FFIS
TA2RUN
TA3FFIS
0
0
0
0
0
0
0