TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 442

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

transaction uses same flow.
renewed. There is no problem in receiving PID if frame data is received with CRC
error, USB sets LOST to STATUS on FRAME register, and frame number is not
renewed. However, in this case, SOF is asserted and FIFO condition is renewed. If
SOF token is received without transmit and transfer Isochronous in frame, UDC
clears FIFO (X Condition) and sets STATUS to FULL.
The UDC finishes normally by above transaction.
Packet A’s FIFO can be received with next data.
In renewed frame, Packet A’s FIFO interchanges with packet B’s FIFO, and
If SOF token is not received by error and so on, this data is lost because frame is not
5. Below is transaction when SOF token is received from host.
• Change the packet A’s FIFO from X Condition to Y Condition and clear data.
• Change the packet B from Y Condition to X Condition.
• Set frame number to frame register.
• Assert SOF and inform externally that frame is incremented.
• DATASET register clears packet A bit and it sets packet B bit arrangement
• Set STATUS to READY.
loading in present frame.
92CF26A-441
TMP92CF26A
2007-11-21