TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 353

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TMP92CF26AXBG

Manufacturer Part Number
TMP92CF26AXBG
Description
Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
Manufacturer
Toshiba
Datasheet

Specifications of TMP92CF26AXBG

Processor Series
TLCS-900
Core
900/H
Data Bus Width
16 bit
Program Memory Type
ROM
Program Memory Size
8 KB
Data Ram Size
144 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
136
Number Of Timers
10
Maximum Operating Temperature
+ 50 C
Mounting Style
SMD/SMT
Package / Case
FBGA-228
Development Tools By Supplier
BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / Rohs Status
 Details

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TOSHIBA
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SBISR
(1243H)
A read-
modify-write
operation
cannot be
performed
Bit symbol
Read/Write
Reset State
Function
Note1: Writing in this register functions as SBICR2.
Note2: The initialdata SBISR<PIN> is “1” if SBI operation is enable (SBICR0<SBIEN>=“1”). If SBI operation is disable
(SBICR0<SBIEN>=“0”), the initialdata of SBISR<PIN> is “0”.
Master/ Slave
status
monitor
0:Slave
1:Master
MST
7
0
Transmitter/
Receiver
status
monitor
0:Receiver
1:Tranmitter
Figure 3.15.6 Registers for the I
TRX
6
0
Serial Bus Interface Status Register
I
monitor
0:Free
1:Busy
2
C bus status
BB
5
0
92CF26A-352
INTSBI
interrupt
request
monitor
0: Interrupt
1: Interrupt
requested
canceled
PIN
4
1
R
Arbitration
lost detection
monitor
0: −
1: Detected
2
C bus mode
AL
3
0
Last received bit monitor
GENERAL CALL detection monitor
Slave address match detection monitor
Arbitration lost detection monitor
0
1
0
1
0
1
0
1
Slave
address
match
detection
monitor
0:Undetected
1: Detected
Slave address don’t match or Undetected
Slave address match or GENERAL CALL
detected
AAS
Last received bit was 0
Last received bit was 1
Undetected
GENERAL CALL detected
Arbitration lost
2
0
GENERAL
CALL
detection
monitor
0:Undetected
1: Detected
AD0
1
0
TMP92CF26A
Last
received bit
monitor
0: 0
1: 1
2007-11-21
LRB
0
0

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