HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 247

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Bit n—DTC Activation Enable (DTCEn)
Bit n
DTCEn
0
1
A DTCE bit can be set for each interrupt source that can activate the DTC. The correspondence
between interrupt sources and DTCE bits is shown in table 8-4, together with the vector number
generated for each interrupt controller.
For DTCE bit setting, use bit manipulation instructions such as BSET and BCLR for reading and
writing. If all interrupts are masked, multiple activation sources can be set at one time by writing
data after executing a dummy read on the relevant register.
8.2.8
DTVECR is an 8-bit readable/writable register that enables or disables DTC activation by
software, and sets a vector number for the software activation interrupt.
DTVECR is initialized to H'00 by a reset and in hardware standby mode.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Bit
Initial value
R/W
Notes: 1. Only 1 can be written to the SWDTE bit.
DTC Vector Register (DTVECR)
2. Bits DTVEC6 to DTVEC0 can be written to when SWDTE = 0.
Description
DTC activation by this interrupt is disabled
[Clearing conditions]
•
•
DTC activation by this interrupt is enabled
[Holding condition]
•
:
:
:
When the DISEL bit is 1 and the data transfer has ended
When the specified number of transfers have ended
When the DISEL bit is 0 and the specified number of transfers have not ended
SWDTE
R/(W)*
7
0
1
DTVEC6
R/W*
6
0
2
DTVEC5
R/W*
5
0
2
DTVEC4
R/W*
4
0
2
DTVEC3
R/W*
3
0
2
Section 8 Data Transfer Controller (DTC)
DTVEC2
R/W*
2
0
2
DTVEC1
R/W*
1
0
2
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(Initial value)
DTVEC0
(n = 7 to 0)
R/W*
0
0
2