HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 449

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Note: The H8S/2635 Group is not equipped with a PPG.
11.1
The chip has an on-chip programmable pulse generator (PPG) that provides pulse outputs by using
the 16-bit timer-pulse unit (TPU) as a time base. The PPG pulse outputs are divided into 4-bit
groups (group 3 and group 2) that can operate both simultaneously and independently.
11.1.1
PPG features are listed below.
• 8-bit output data
• Two output groups
• Selectable output trigger signals
• Non-overlap mode
• Can operate together with the data transfer controller (DTC)
• Settable inverted output
• Module stop mode can be set
REJ09B0103-0800 Rev. 8.00
May 28, 2010
⎯ Maximum 8-bit data can be output, and output can be enabled on a bit-by-bit basis
⎯ Output trigger signals can be selected in 4-bit groups to provide up to two different 4-bit
⎯ Output trigger signals can be selected for each group from the compare match signals of
⎯ A non-overlap margin can be provided between pulse outputs
⎯ The compare match signals selected as output trigger signals can activate the DTC for
⎯ Inverted data can be output for each group
⎯ As the initial setting, PPG operation is halted. Register access is enabled by exiting module
outputs
four TPU channels
sequential output of data without CPU intervention
stop mode
Section 11 Programmable Pulse Generator (PPG)
Overview
Features
Section 11 Programmable Pulse Generator (PPG)
Page 399 of 1458

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