HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 923
HD64F2638F20J
Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Specifications of HD64F2638F20J
Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
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H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Note: If a memory cell does not operate normally and cannot be erased, one H'FF byte is
continuously at prescribed bit rate
host to indicate end of adjustment
of H'00 data transmitted by host
transmits one H'00 data byte to
Host confirms normal reception
indication (H'00), and transmits
After bit rate adjustment, chip
sets value in bit rate register
Chip calculates bit rate and
Chip measures low period
of bit rate adjustment end
Host transfers data (H'00)
and execute reset-start
LSI transmits one H'AA
Set pins to boot mode
transmitted as an erase error, and the erase operation and subsequent operations
are halted.
After receiving H'55,
one H'55 data byte
data byte to host
Start
Figure 21C-8 Boot Mode Execution Procedure
Host transmits programming control
program transferred to on-chip RAM
program sequentially in byte units
of programming control program
number of bytes to host as verify
programming control program to
control program to on-chip RAM
if data has already been written,
Transfer received programming
memory data has been erased,
host as verify data (echo-back)
Check flash memory data, and
bytes (N), upper byte followed
chip transmits one H'AA data
Execute programming control
After confirming that all flash
Chip transmits received
Chip transmits received
Host transmits number
End of transmission
data (echo-back)
erase all blocks
by lower byte
byte to host
n = N?
n = 1
Yes
No
n + 1 → n
Section 21C ROM
(H8S/2635 Group)
Page 873 of 1458
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