SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 115

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

5.2.2
5.2.3
ARM DDI0198D
Instruction TCM signals
Differences between DTCM and ITCM
The instruction side TCM signals are almost identical to the DTCM signals. All the
signals on the DTCM have an equivalent on the instruction side.
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There are three differences between the DTCM and ITCM interfaces:
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Copyright © 2001-2003 ARM Limited. All rights reserved.
Control signals
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Address and attribute signals
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Data signals
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DMA signals
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DMA to ITCM should not occur be performed unless IRIDLE is asserted
Only back-to-back transfers on the DTCM can be marked as sequential. On the
ITCM idle cycles may occur before requests marked as sequential.
Sequential write transfers will not occur on the ITCM.
IRCS
IRWAIT
IRIDLE
IRSEQ
IRADDR[17:0]
IRWBL[3:0]
IRnRW
IRRD[31:0]
IRWD[31:0]
IRDMAEN
IRDMACS
IRDMAADDR[17:0].
Tightly-Coupled Memory Interface
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