SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 194

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SAM9G45

Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G45

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Signal Descriptions
A-6
Name
CHSEX[1:0]
Coprocessor
handshake execute
nCPINSTRVALID
Coprocessor valid
instruction
nCPMREQ
Not coprocessor
instruction request
nCPTRANS
Not coprocessor
memory translate
Copyright © 2001-2003 ARM Limited. All rights reserved.
Direction
Input
Output
Output
Output
Table A-2 Coprocessor interface signals (continued)
Description
The handshake signals from the Execute stage of the
coprocessors pipeline follower. Indicates ABSENT
(10), WAIT (00), GO (01), or LAST (11). If no
external coprocessors are attached these must be tied
to b10 (ABSENT response).
Valid instruction indicator for CPINSTR (replaces
CPTBIT).
If this signal is LOW on the rising edge of CLK and
CPCLKEN is HIGH, the instruction on CPINSTR
must enter the coprocessor pipeline.
When LOW the coprocessor interface is in a
nonprivileged state. When HIGH the coprocessor
interface is in a privileged state.
ARM DDI0198D

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