SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 196

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SAM9G45

Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G45

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Signal Descriptions
A-8
Name
DBGRNG[1:0]
EmbeddedICE-RT
range out
DBGRQI
Internal debug request
EDBGRQ
External debug request
Copyright © 2001-2003 ARM Limited. All rights reserved.
Direction
Output
Output
Input
Description
Indicates that the corresponding EmbeddedICE-RT
watchpoint register has matched the conditions
currently present on the address, data, and control
buses. This signal is independent of the state of the
watchpoint enable control bit.
Represents the debug request signal that is presented
to the core debug logic. This is a combination of
EDBGRQ and bit 1 of the debug control register.
An external debugger can force the processor into
debug state by asserting this signal.
Table A-3 Debug signals (continued)
ARM DDI0198D

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