SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 90

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SAM9G45

Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G45

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Memory Management Unit
3.5
3-26
Fault checking sequence
permission
translation
Section
Section
Section
domain
fault
fault
fault
The sequence the MMU uses to check for access faults is different for sections and
pages. The sequence for both types of access is shown in Figure 3-13.
The conditions that generate each of the faults are described in:
No access (00)
Reserved (10)
Violation
Copyright © 2001-2003 ARM Limited. All rights reserved.
Invalid
Alignment faults on page 3-27
permissions
Client (01)
Section
Section
access
Check
Check address alignment
Get first-level descriptor
Modified virtual address
Check domain status
Physical address
Manager
(11)
permissions
table entry
Client (01)
Get page
access
Check
Page
Page
Figure 3-13 Sequence for checking faults
No access (00)
Reserved (10)
Misaligned
Violation
Invalid
ARM DDI0198D
translation
Alignment
permission
domain
Page
fault
fault
Page
Page
fault
fault

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