DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 100

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

4–20
Stratix IV Device Handbook Volume 1
Double Multiplier
You can configure the Stratix IV DSP block to efficiently support a signed or unsigned
54 × 54-bit multiplier that is required to compute the mantissa portion of an IEEE
double-precision floating point multiplication. You can build a 54 × 54-bit multiplier
using basic 18 × 18 multipliers, shifters, and adders. In order to efficiently use the
Stratix IV DSP block’s built-in shifters and adders, a special double mode (partial
54 × 54 multiplier) is available that is a slight modification to the basic 36 × 36
multiplier mode, as shown in
Figure 4–12. Double Mode Shown for a Half DSP Block
dataa_0[35..18]
datab_0[35..18]
datab_0[35..18]
dataa_0[35..18]
dataa_0[17..0]
datab_0[17..0]
dataa_0[17..0]
datab_0[17..0]
clock[3..0]
ena[3..0]
aclr[3..0]
Half-DSP Block
Figure 4–12
signa
signb
+
+
and
Figure
Chapter 4: DSP Blocks in Stratix IV Devices
4–13.
+
Stratix IV Operational Mode Descriptions
February 2011 Altera Corporation
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