DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 989

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 1: ALTGX Transceiver Setup Guide for Stratix IV Devices
Reconfiguration Settings
Table 1–8. MegaWizard Plug-In Manager Options (Main PLL Screen) (Part 2 of 3)
February 2011 Altera Corporation
What is the selected input
clock source for the Rx/Tx
PLLs?
What is the protocol to be
reconfigured to?
What is the subprotocol to be
reconfigured to?
What would you like to base
the setting on?
What is the data rate?
ALTGX Setting
Assign identification numbers to all input reference clocks
that are used by the transmitter PLLs in their corresponding
PLL screens. You can set up a maximum of 10 input
reference clocks and assign identification numbers from 1 to
10.
Select the desired functional mode here, if you intend to
dynamically reconfigure the transceiver channel to a different
functional mode using the alternate transmitter PLL.
This option is not available for Basic, (OIF) CEI PHY
Interface, Serial RapidIO, GIGE, and XAUI functional modes.
This option is available for the following protocols and
subprotocols:
■
■
■
This option is available only for Basic mode.You can select
one of the following options for the alternate transmitter PLL:
■
■
These settings are to dynamically reconfigure the transceiver
channel to listen to the alternate transmitter PLL.
■
■
Protocol = PCIe; Subprotocols = Gen 1 and Gen 2
Protocol = SDI; Subprotocols = 3G and HD
Protocol = SONET/SDH; Subprotocols = OC12, OC48, and
OC96
Input clock frequency—Selecting this option allows you
to enter your input clock frequency. Based on the value
you enter, the ALTGX MegaWizard Plug-In Manager
populates the data rate options in the What is the effective
data rate? field. The ALTGX MegaWizard Plug-In Manager
determines these data rate options depending on the
available multiplier settings.
Data rate—Selecting this option allows you to enter the
transceiver channel serial data rate. Based on the value
you enter, the ALTGX MegaWizard Plug-In Manager
populates the input reference clock frequency options in
the What is the input clock frequency? field. The ALTGX
MegaWizard Plug-In Manager determines these input
reference clock frequencies depending on the available
multiplier settings.
If you select the data rate option in the What would you
like to base the setting on? field, the ALTGX MegaWizard
Plug-In Manager allows you to specify the effective serial
data rate value in this field.
If you select the input clock frequency option in the What
would you like to base the setting on? field, the ALTGX
MegaWizard Plug-In Manager displays the list of effective
serial data rates in this field.
Description
Stratix IV Device Handbook Volume 3
“Guidelines for Specifying
the Input Reference Clocks”
section in the
Reconfiguration in
Stratix IV Devices
“Channel Reconfiguration
with Transmitter PLL Select
Mode Details” in the
Dynamic Reconfiguration in
Stratix IV Devices
Reference
—
—
—
Dynamic
chapter.
chapter.
1–31